Selected Publications - 2005:
1) Titanium added praseodymium silicate high-k layers on Si(001)
T. Schroeder, G. Lupina, Ch. Wenger, A. Mane, G. Lippert and H.-J. Müssig,
IHP Microelectronics, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany
Applied Physics Letters 87(2), 022902 (2005).
Titanium added praseodymium silicate layers on Si(001) are promising high-k insulators for silicon-based nanoelelctronics. Synchrotron raditation X-ray photoelectron spectroscopy was applied to study the effect of titanium additives on the praseodymium silicate / Si system. Nondestructuve depth profiling by variation of the photoelectron excitation energy shows that thermal annealing activates the diffusion of deposited titanium into the praseodymium silicate. A homogeneous praseodymium titanium silicate layer is formed which shows high quality electrically properties.
PDF published by AIP Journals (http://journals.aip.org)
2) Preparation of praseodymium silicate dielectrics with an atomically abrupt interface on Si(100)
G. Lupina, T. Schroeder, J. Dabrowski, Ch. Wenger, A. Mane, G. Lippert, H.-J. Müssig, P. Hoffmann*, and D. Schmeißer*
IHP Microelectronics, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany
* BTU Cottbus, PF 101344, 03013 Cottbus, Germany
Applied Physics Letters 87(9), 092901 (2005).
Synchrotron radiation x-ray photoelectron spectroscopy was applied to study the solid state reaction between praseodymium and thin silicon dioxide layers on Si(100). Non-destructive depth profiling studies by variation of the incident photon energy indicate after praseodymium deposition at room temperature the reaction of the upper silicon dioxide to praseodymium oxide and silicide. High-temperature annealing of films with an apropriate praseodymium / silicon dioxide ratio results in homogeneous praseodymium silicate films with an atomically abrupt interface. Ab initio calculations corroborate the results of the photoemission study.
PDF published by AIP Journals (http://journals.aip.org)
3) A CMOS Process-Compatible Wet-Etching Recipe for the High-k Gate Dielectrics Pr2O3 and Pr2-xTixO3
A. U. Mane, Ch. Wenger, T. Schroeder, P. Zaumseil, G. Lippert, G. Weidner, and H.-J. Müssig
IHP Microelectronics, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany
Journal of the Electrochemical Society 152(6), C399-C402 (2005).
The fabrication of complementary metal oxide semiconductor (CMOS) structures with praseodymium oxide (Pr2O3) or titanium doped praseodymium oxide (Pr2-xTixO3) ((1£ x £0) ) layers as integrated high-k gate dielectrics requires the development of a process-compatible etching recipe. Different wet-etching processes in acid-based chemistry were evaluated and solutions of diluted sulfuric acid were identified as suitable etchants for Pr2O3 and Pr2-xTixO3 layers on Si substrates. Metal-oxide-semiconductor stacks with poly-Si as the potential gate electrode were patterned with the help of tetramethyl ammonium hydroxide as the selective etchant attacking the poly-Si gate electrode material but not the underlying Pr-based high-k gate dielectric layers.
4) Process Integration of Pr-based High–k Gate Dielectrics
A. U. Mane, Ch. Wenger, G. Lupina, T. Schroeder, G. Lippert, R. Sorge, P. Zaumseil, G. Weidner, J. Dabrowski and H.-J. Müssig
IHP Microelectronics, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany
Microelectronic Engineering 82, 148-153 (2005)
We present microprocessing compatibility of Pr-based high-k gate dielectrics for complementary metal-oxide-semiconductor (CMOS) devices. MOS structures integrated with boron-doped poly-Si and Pr-based oxides layers were deposited by molecular beam epitaxy (MBE) process. Reactive ion etching (RIE) with CF4/O2 plasma was used to etch the poly-Si layer selectively. Diluted H2SO4 based solutions was used to etch Pr-based oxides layers. Details of etch kinetics of Pr-based oxides layers, poly-Si and electrical properties of MOS devices are presented.