Design Kit

 

The design kits support a Cadence mixed signal platform:

 

  • Design Framework II (Cadence 5.0-5.1 / 6.1 scheduled for Q4 2007)

  • Behavioral Modeling (Verilog HDL)

  • Logic Synthesis & Optimization (VHDL / HDL Compiler, Design Compiler / Synopsys,
        Power Compiler / Synopsys)

  • Test Generation / Synthesizer / Test Compiler (Synopsys)

  • Simulation (RF: SpectreRF, Analog: SpectreS, Behavioral / Digital: Leapfrog / NC-Affirma /
        Verilog-XL / ModelSim)

  • Place & Route (Silicon Ensemble & Preview)

  • Layout (Virtuoso Editor - Cadence)

  • Verification (Diva and Assura: DRC / LVS / Extract / Parasitic Extraction)

  • ADS-support via RFDE/RFIC dynamic link in Cadence is available

  • A standalone ADS Kit including Momentum substrate layer file is supported, but without
        layout support

  • Support of Analog Office, Catena, and Tanner via partners is available

  • ECL library for SGB25VD

    •  

  • Radiation hard CMOS library is planned

  • β Design Kit for 0.13 µm BiCMOS will be available from Q4 2007

    • www.ihp-microelectronics.com