IHP - GALS and Asynchronous Research
Topics of Research:
• Globally Asynchronous Locally Synchronous (GALS) circuits for low-power and low-EMI
communication systems
• Low-power VLSI design for wireless communications
• Dual-mode synchronous/asynchronous circuits
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GALS baseband processor complaint to the IEEE 802.11a standard |
Research Projects:
• EU project GALS InterfAce for CompleX Digital SYstem Integration (GALAXY)
Former Projects:
• EU project ASynchronous open-source Processor IP of the DLX Architecture (ASPIDA)
• Wireless Gigabit With Advanced Multimedia Support (WIGWAM)
(German Ministry of Education and Research funded project on 5 GHz WLAN)
• EU project WINDECT (DECT over WLAN)
• ACiD WG EU project (Working Group on Asynchronous Circuit Design)
People:
Recent Publications:
• M. Krstić, E. Grass, F. Gürkaynak, P. Vivet, Globally Asynchronous, Locally Synchronous
Circuits: Overview & Outlook, IEEE Design & Test of Computers, Vol. 24, No. 5.
September-October 2007, pp. 430-441.
(abstract and full text for IEEE digital library subscribers)
• M. Krstić, E. Grass, C. Stahl, M. Piz, System Integration by Request-driven GALS Design,
IEE Proc. Computers & Digital Techniques, Vol. 153, Issue 5, September 2006, pp 362-372.
(full text for IEEE digital library subscribers)
• E. Grass, F. Winkler, M. Krstić, A. Julius, C. Stahl, M. Piz, Enhanced GALS Techniques for
Datapath Applications, Proc. International Workshop on Power And Timing Modeling,
Optimization and Simulation (PATMOS), LNCS 3728, Springer Verlag, pp. 581-590, Leuven,
Belgium, 2005.
(abstract)
• M. Krstić, E. Grass, BIST Technique for GALS Systems, Proceedings - 8th EUROMICRO
Conference on Digital System Design (DSD 2005)- Architectures, Methods and Tools, Porto,
Portugal, pp. 10-16, August 30th - September 3rd, 2005.
(abstract)
• C. Stahl, W. Reisig, M. Krstić, Hazard Detection in a GALS Wrapper: a Case study,
In Desel, J. and Watanabe, Y., editors, 5th International Conference on Application of
Concurrency to System Design (ACSD’05), pages 234-243, IEEE Computer Society, 2005.
(full paper)
• M. Krstić, E. Grass, C. Stahl, “Request-driven GALS Technique for Wireless Communication
System”, Proc. 11th IEEE International Symposium on Asynchronous Circuits and Systems
(ASYNC 2005), pp. 76-85, New York, Mar 2005.
(abstract and full text for IEEE digital library subscribers)
• M. Krstić, E. Grass, “GALSification of IEEE 802.11a Baseband Processor”, Proceedings of
PATMOS 2004, Santorini, Greece, LNCS 3254, Springer Verlag, ISBN 3-540-23095-5,
pp. 258-267, September 2004.
(abstract)
• M. Krstić, E. Grass, “GALS Baseband Processor for WLAN”, Collection of regular and
poster presentation of ACiD-WG Workshop, Turku, Finland, June 2004.
(abstract) (slides)
• M. Krstić, E. Grass, “New GALS Technique for Datapath Architectures”, Proceedings of
PATMOS 2003, Turin, Italy, LNCS 2799, Springer Verlag, ISBN 3-540-20074-6,
pp. 161-170, September 2003.
(abstract)
• M. Krstić, E. Grass, “Request-driven GALS Technique for Datapath Architectures”,
Collection of regular and poster presentation of ACiD-WG Workshop, Crete, Greece,
January 2003.
(abstract) (slides)
• E. Grass, B. Sarker, K. Maharatna, "A Dual-Mode Synchronous/Asynchronous CORDIC
Processor", The Eighth IEEE International Symposium on Asynchronous Circuits and
Systems, Async 2002, Manchester, UK, April 08 - 11, 2002.
(abstract and full text for IEEE digital library subscribers)
• B. Sarker, E. Grass, K. Maharatna, "Asynchronous CORDIC Processor Implementation",
2nd Asynchronous Circuit Design Workshop ACiD 2002, Munich, Germany,
28-29 January, 2002.
(abstract) (slides)
Links:
print version