The MOSFET test chips contain pre-prepared NMOS and PMOS transistor structures which, after removing a protective oxide layer (gate replacement approach), can be covered with high-k dielectric and metal gate electrode layers. After gate stack deposition, only one additional lithography step is required to obtain fully functional high-k/metal gate CMOS transistors [Fig. 3]. In this simple way, an advanced characterization of high-k gate dielectrics in MOSFET structures can be performed.

Fig. 3: IHP test structures enable easy and fast evaluation of various high-k dielectrics in MOSFET device.

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