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Fig. 4: Fragment of the high-k test chip containing NMOS and PMOS transistors. |
Besides the structures for high-k/metal gate stack testing the test chip contains also conventional SiO2-based CMOS devices serving as references.
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Fig. 4: Fragment of the high-k test chip containing NMOS and PMOS transistors. |
The high-k MOSFET test structures are manufactured on 8-inch Si wafers in the IHP cleanroom facilities and are offered to project partners as well as to external customers.