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  • Publikationen 2017

Publikationen 2017

seit Januar 2017

(1) The Impact of Donors on Recombination Mechanisms in Heavily Doped Ge/Si Layers
M.R. Barget, M. Virgilio, G. Capellini, Y. Yamamoto, T. Schroeder
Journal of Applied Physics 121, 245701 (2017)
(Ge Laser)
Heavy n-type doping has been proposed as a route to achieve positive optical gain in germanium (Ge) layers since it is supposed to enhance the c carrier density. Nevertheless, the impact of doping on the excess carrier lifetime has not yet been addressed in the literature. To elucidate this point we investigate the optical properties of heavily doped Ge layers selectively grown on silicon by means of photoluminescence (PL) experiments and theoretical modeling. A self-consistent multi-valley effective mass numerical model for simulation of PL spectra has been implemented, taking into account the influence of dopants on the non-radiative recombination dynamics. Upon comparing measurements and modeling, we find that the Shockley-Read-Hall (SRH) mechanism dominates Auger recombination up to a donor density of ~5×1019 cm-3. Furthermore, we propose a linear dependence of the defect-related recombination rate as a function of the donor density. We find a reduction of the non-radiative lifetime from about 30 ns in the intrinsic case to ~0.3 ns for a doping density in the 1019 cm-3 range, accompanied by a drop of two orders of magnitude in the excess carrier density. Despite this reduced lifetime, we observe an overall positive impact of doping on the radiative recombination rate for donor densities up to an “ideal” value of ~3×1019 cm-3, with a 7× intensity enhancement compared to the intrinsic case. A further increase of the donor concentration brings about a worsening of the optical emission.

(2) Very High Aspect Ration Through Silicon via Reflectometry
J. Bauer, F. Heinrich, O. Fursenko, St. Marschmeyer, A. Bluemich, S. Pulwer, P. Steglich, C. Villringer, A. Mai, S. Schrader
Proc. SPIE Optical Metrology 2017, 10329, 103293J (2017)

(3) Development of a Multi-Project Fan-Out Wafer Level Packaging Platform
T. Braun, S. Raatz, U. Maas, M. van Dijk, H. Walter, O. Hölck, K.-F. Becker, M. Töpper, M. Wöhrmann, S. Voges, M. Huhn, K.-D. Lang, M. Wietstruck, R.F. Scholz, A. Mai, M. Kaynak
Proc. 67th IEEE Electronic Components and Technology Conference (ECTC 2017), 2 (2017)

(4) A NIR-LED Based on Tensile Strained, Heavily Doped Ge/Si µ-Strips Fabricated in a BiCMOS Pilot Line
G. Capellini, St. Lischke, L.-W. Nien, J. Kreissl, Y. Yamamoto, M. Virgilio, J. Schäffner, W.M. Klesse, D. Wolansky, K. Voigt, L. Zimmermann, A. Mai, B. Tillack, T. Schroeder
Proc. IEEE International Conference on Group IV Photonics (GFP 2017), 43 (2017)
(Ge Laser)
We present an edge light emitting diode based on tensile strained, highly doped Ge µ-strips deposited on Si. The device is fully manufactured in a BiCMOS pilot line and shows room temperature NIR electroluminescence in a spectral region extending from the C- to the U- telecom bands and beyond.

(5) BiCMOS Microfluidic Microwave Platform for Biological Cell Sensing and Manipulation
B. Cetindogan, M. Inac,, A. Goritz, M. Wietstruck, C. Baristiran Kaynak, C. Palego, A. Pothier, M. Kaynak
Proc. IEEE MTT-S International Microwave Symposium (IMS 2017), (2017)
(SUMCASTEC)

(6) A 5-13 GHz 6-Bit Vector-Sum Phase Shifter with +3.5 dBm IP1dB in 0.25-µm SiGe BiCMOS
B. Cetindogan, B. Ustundag, A. Burak, M. Wietstruck, M. Kaynak, Y. Gurbuz
Proc. Asia Pacific Microwave Conference (APMC 2017), TH2C4 (2017)
(IHP-Sabanci Joint Lab)
This paper presents a wideband vector-sum phase shifter (VSPS) with high phase resolution and high input-referred 1 dB compression point (IP1dB) which covers the full 360 degree phase range with 5.6 degree phase steps between 5-13 GHz in a commercial 0.25-um SiGe BiCMOS technology. A transformer balun and and RC polyphase filter (PPF) are implemented for in-phase and quadrature phase (I/Q) reference vector generation while the desired phase states are generated by an adder stage where the amplitudes of the I/Q reference vectors are manipulated with digitally controlled variable gain amplifiers (VGAs). The measured root mean square (RMS) phase error of the VSPS is less than 2.8 degrees between 7.4-10.3 GHz and less than 5.6 degrees between 5.4-11.9 GHz with a measured insertion loss greater than 7.8 dB. Thus, the VSPS achieves 6-bit phase resolution. IP1dB for the first state of the VSPS at 10 GHz is measured to be +3.5 dBm. Overall chip size of the VSPS IC is only 0.71 mm2, excluding the RF and the DC pads.

(7) Si/SiGe:C and InP/GaAsSb Heterojunction Bipolar Transistors for THz Applications
P. Chevalier, M. Schröter, R. Bolognesi, V. d'Alessandro, M. Alexandrova, J. Böck, R. Flückiger, S. Fregonese, B. Heinemann, C. Jungemann, R. Lövblom, C. Maneux, O. Ostinelli, A. Pawlak, N. Rinaldi, H. Rücker, G. Wedel, T. Zimmer
Proceedings of the IEEE 105(6), 1035 (2017)
(Dotseven)
This paper presents Si/SiGe:C and InP/GaAsSb HBTs which feature specific assets to address submillimeter-wave and THz applications. Process and modeling status and challenges are reviewed. The specific topics of thermal and substrate effects, reliability, and HF measurements are also discussed.

(8) A New 5–13 GHz Slow-Wave SPDT Switch with Reverse-Saturated SiGe HBTs
M. Davulcu, E. Özeren, M. Kaynak, Y. Gurbuz
IEEE Microwave and Wireless Components Letters 27(6), 581 (2017)
(IHP-Sabanci Joint Lab)
This letter describes the analysis, design, and measured results of a fully integrated single-pole double-throw (SPDT) switch developed in 0.25-μm silicon–germanium (SiGe) BiCMOS process technology, which features SiGe HBTs with peak fT / fmax of 110/180 GHz. The switch is designed based on a shunt–shunt topology with a combination of various design and layout optimization approaches to improve the insertion loss (IL), isolation, and power handling capability. The designed switch including the applied techniques results
in a measured IL of 2.3 dB and isolation of 32 dB at 8 GHz. The switch is able to attain a state-of-the-art input referred 1-dB compression point (IP1 dB) up to 30 dBm while drawing
a current of 3 mA from a 6 V supply. The die has an area of only 775 μm × 820 μm. To the author’s knowledge, the presented work is the first SPDT switch ever reported, that
incorporates slow-wave transmission lines and reverse-saturated heterojunction bipolar transistors at the specified frequency range.

(9) Towards GaN Integration on Si: Microstructural Study of ScN Grown on Si(111) by Plasma-Assisted MBE for Applications as a Buffer Layer
R. Delgado, M.H. Zoellner, P. Sana, H. Tetzner, P. Zaumseil, J. Dabrowski, M.A. Schubert, T. Schroeder
Proc. Austrian MBE Workshop 2017, abstr. book (2017)

(10) Hybrid Graphene/Silicon Schottky Photodiode with Intrinsic Gating Effect
A. Di Bartolomeo, G. Luongo, F. Giubileo, N. Funicello, G. Niu, T. Schroeder, M. Lisker, G. Lupina
2D Materials 4, 025075 (2017)
(Graphen)
We propose a hybrid device consisting of a graphene/silicon (Gr/Si) Schottky diode in parallel with a Gr/SiO2/Si capacitor for high-performance photodetection. The device, fabricated by transfer of commercial graphene on low-doped n-type Si substrate, achieves a photoresponse as high as 3 AW−1 and a normalized detectivity higher than 3.5×1012 cm Hz1/2 W−1 in the visible range. It exhibits a photocurrent exceeding the forward current because photo-generated minority carriers, accumulated at Si/SiO2 interface of the Gr/SiO2/Si capacitor, diffuse to the Gr/Si junction. We show that the same mechanism, when due to thermally generated carriers, although usually neglected or disregarded, causes the increased leakage often measured in Gr/Si heterojunctions. We perform extensive I–V and C-V characterization at different temperatures and we measure a zero-bias Schottky barrier height of 0.52 eV at room temperature, as well as an effective Richardson constant A** = 4×10−5 A cm−2 K−2 and an ideality factor n ≈3.6, explained by a thin (<1 nm) oxide layer at the Gr/Si interface.

(11) Tunable Schottky Barrier and High Responsivity in Graphene/Si-Nanotip Optoelectronic Device
A. Di Bartolomeo, F. Giubileo, G. Luongo, L. Iemmo, N. Martucciello, G. Niu, M. Fraschke, O. Skibitzki, T. Schroeder, G. Lupina
2D Materials 4, 015024 (2017)
Wedemonstrate tunable Schottky barrier height and record photo-responsivity in a new-concept device made of a single-layerCVDgraphene transferred onto a matrix of nanotips patterned on n-type Si wafer. The original layout, where nano-sized graphene/Si heterojunctions alternate to graphene areas exposed to the electric field of the Si substrate, which acts both as diode cathode and transistor gate, results in a two-terminal barristor with single-bias control of the Schottky barrier. The nanotip patterning favors light absorption, and the enhancement of the electric field at the tip apex improves photo-charge separation and enables internal gain by impact ionization. These features render the device a photodetector with responsivity (3 A W-1 forwhite LEDlight at 3 mW cm-2 intensity) almost an order of magnitude higher than commercial photodiodes.Weextensively characterize the
voltage and the temperature dependence of the device parameters, and prove that the multi-junction approach does not add extra-inhomogeneity to the Schottky barrier height distribution.We also introduce a new phenomenological graphene/semiconductor diode equation, which well describes the experimental I–V characteristics both in forward and reverse bias.

(12) A Novel 25 Gbps Electro-Optic Pockels Modulator Integrated on an Advanced Si Photonic Platform
F. Eltes, M. Kroh, D. Caimi, Ch. Mai, Y. Popoff, G. Winzer, D. Petousi, St. Lischke, J.E. Ortmann, L. Czornomaz, L. Zimmermann, J. Fompeyrine, S. Abel
Proc. IEEE International Electron Devices Meeting (IEDM 2017), 601 (2017)
(PHRESCO)
We demonstrate for the first time an electro-optical modulator exploiting the Pockels effect monolithically co-integrated on a silicon photonic platform, outperforming Si photonic modulators in modulation efficiency, losses, and static tuning power. The modulators, based on barium titanate thin films on 200 mm substrates, show excellent VπL (0.3 Vcm) and VπLα (1.7 VdB), work at high speed (25 Gbps), and can be tuned at low static power consumption (100 nW). As an additional building block in EPIC designs they enable new types of photonic circuits in future 100G systems.

(13) A Novel 25 Gbps Electro-Optic Pockels Modulator Integrated on an Advanced Si Photonic Platform
F. Eltes, M. Kroh, D. Caimi, Ch. Mai, Y. Popoff, G. Winzer, D. Petousi, St. Lischke, J.E. Ortmann, L. Czornomaz, L. Zimmermann, J. Fompeyrine, S. Abel
Proc. IEEE International Electron Devices Meeting (IEDM 2017), 601 (2017)
(SITOGA)
We demonstrate for the first time an electro-optical modulator exploiting the Pockels effect monolithically co-integrated on a silicon photonic platform, outperforming Si photonic modulators in modulation efficiency, losses, and static tuning power. The modulators, based on barium titanate thin films on 200 mm substrates, show excellent VπL (0.3 Vcm) and VπLα (1.7 VdB), work at high speed (25 Gbps), and can be tuned at low static power consumption (100 nW). As an additional building block in EPIC designs they enable new types of photonic circuits in future 100G systems.

(14) A 15.5-dBm 160-GHz High-Gain Power Amplifier in SiGe BiCMOS Technology
M. Furqan, F. Ahmed, B. Heinemann, A. Stelzer
IEEE Microwave and Wireless Components Letters 27(2), 177 (2017)
(Dotseven)
This letter presents the design of a 160 GHz cascode based differential power amplifier (PA) realized in a 130 nm SiGe BiCMOS technology. It consists of 4 driving stages and an output
power stage, providing a peak differential gain of 30 dB and a 3-dB small-signal bandwidth of around 50 GHz. Gain is enhanced by means of inductive positive feedback in the commonbase stage. By using optimally sized HBTs in the power stage and operating in the weak avalanche region, high output power is achieved. The designed PA achieves a peak differential Psat of 15.5 dBm at 160 GHz and a PAE of 7.2%, which is to-date
the highest reported output power for PAs above 150 GHz, in Si-based technologies.

(15) Development of Graphene Process Control by Industrial Optical Spectroscopy Setup
O. Fursenko, M. Lukosius, G. Lupina, J. Bauer, C. Villringer, A. Mai
Proceedings of SPIE 10330, 1033017 (2017)

(16) A Low Power CMOS readout IC Design for Bolometer Applications
A. Galioglu, S. Abbasi, A. Shafique, Ö. Ceylan, M. Yazici, M. Kaynak, E.C. Durmaz, E. G. Arsoy, Y. Gurbuz
Proc. SPIE Security and Defence 2017, 10177, 10177U-1 (2017)
(IHP-Sabanci Joint Lab)

(17) A 40 Gb/s PAM-4 Monolithically Integrated Photonic Transmitter in 0.25 μm SiGe:C BiCMOS EPIC Platform
I. Garcia Lopez, P. Rito, D. Petousi, L. Zimmermann, M. Kroh, St. Lischke, D. Knoll, A. Awny, A.C. Ulusoy, D. Kissinger
Proc. IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2017), 30 (2017)
(SPEED)

(18) Prozesskontrolle für die Dünnschichtverkapselung von BiCMOS HF-MEMS-Schaltern mittels BEOL-integriertem Pirani-Element
A. Göritz, S. Tolunay Wipf, M. Wietstruck, M. Kaynak, A. Mai
Proc. 7. MikroSystemTechnik Kongress (MST 2017), 116 (2017)

(19) Solid-State Terahertz Superresolution Imaging Device in 130-nm SiGe BiCMOS Technology
J. Grzyb, B. Heinemann, U. Pfeiffer
IEEE Transactions on Microwave Theory and Techniques 65(11), 4357 (2017)
(Dotseven)
Breaking through diffraction limit at terahertz frequencies is currently performed with the near-field scanning optical microscopy, which suffers from low integration and sensitivity limitations. In this paper, a solid-state superresolution imaging device in 130-nm SiGe BiCMOS technology operating around 534–562 GHz is presented. The device exhibits a singlechip integration of the complete imaging functionality, including a tunable CW illumination source, near-field sensing, and power detection with a high response of up to 9.65 μA and a noiseequivalent power of around 15–21 pW/ √Hz at 60 kHz. Here, the
stopband characteristics of a novel cross-bridged double splitring resonator are exploited as an object-tunable transmission gate between a 3-push Colpitts oscillator and a simple HBT power detector. The resonator features a 3-D topography to achieve high-spatial confinement of the surface near-fields and is capable of resolving structural details with an estimated lateral resolution down to 10–12 μm. For a separate antenna-coupled oscillator breakout, a radiated power of up to 28.2 μW was measured. Furthermore, a 2-D raster-scanned superresolution image with a remarkable signal-to-noise ratio of 42 dB was captured for the
device operating even at dc.

(20) High Data-Rate Communication Link at 240 GHz with On-Chip Antenna-Integrated Transmitter and Receiver Modules Integrated in SiGe HBT Technology
J. Grzyb, P.R. Vazquez, N. Sarmah, W. Förster, B. Heinemann, U. Pfeiffer
Proc. European Conference on Antennas and Propagation (EuCAP 2017), 1369 (2017)
(Dotseven)

(21) A 240 GHz High-Speed Transmission Link with Highly-Integrated Transmitter and Receiver Modules in SiGe HBT Technology
J. Grzyb, P.R. Vazquez, N. Sarmah, B. Heinemann, U.R. Pfeiffer
Proc. 42th International Conference on Infrared, Millimeter, and THz Waves (IRMMW-THz 2017), (2017)
(Dotseven)

(22) Fully-Differential, DC-Coupled, Self-Biased, Monolithically-Integrated Optical Receiver in 0.25μm Photonic BiCMOS Technology for Multi-Channel Fiber Links
S. Gudyriev, J.C. Scheytt, L. Yan, Ch. Meuer, L. Zimmermann
Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2017), 110 (2017)
(Photonics)
A fully-differential receiver structure for fiber links
is presented, in which the photodiode (PD) is DC-coupled to the
transimpedance amplifier (TIA) and biased through the feedback
resistors. The biasing voltage is defined by the internal structure
of the input stage. Different options are suggested that allow to
adjust PD biasing. Multiple architecture variants are proposed,
that were implemented in 0.25µm SiGe BiCMOS technology.
Initial measurement results are reported, proving the feasibility of
the concept. A 25Gbps hybrid receiver designed to comply with a
specific standard is also presented, featuring large horizontal eye
opening of 800mV, OMA of -15dBm at BER of 10-6 and power
dissipation of 330mW from a single 3.3V power supply.

(23) Fully-Differential, Hybrid, Multi-Channel 4x25Gbps Direct Direction Receiver in 0.25μm BiCMOS SiGe Technology
S. Gudyriev, J.C. Scheytt, L. Yan, Ch. Meuer, L. Zimmermann
Proc. Frontiers in Optics 2017, FM3a (2017)
A hybrid multi-channel receiver featuring fully-differential transimpedance input stages for 25Gbps data rate per channel is presented along with measurement results. OMA of -16dBm at a BER of 10-4 is estimated at the photodiode for all channels.

(24) Integrated Fresnel Zone Plate in the SOI Backend for Improved Laser to Chip Coupling Efficiency
M. Henniges, St. Meister, H. Rhee, Ch. Theiss, H. Robers, M. Grehn, D. Stolarek, L. Zimmermann, U. Woggon
Proc. IEEE Optical Interconnects Conference (OI 2017), 23 (2017)
(SPEED)
A zone plate, etched into the backend of a silicon-on-insulator chip, was designed to improve the optical coupling efficiency between grating couplers and non-perpendicular light sources with an elliptical beam profile. Measurements of a highly divergent light source showed efficiency improvements up to 8.7dB.

(25) A Lens-Integrated 430 GHz SiGe HBT Source with up to -6.3 dBm Radiated Power
P. Hillger, J. Grzyb, S. Malz, B. Heinemann, U. Pfeiffer
Proc. IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2017), 160 (2017)
(Dotseven)

(26) Biological Cell Discrimination Based on Their High Frequency Dielectrophoretic Signatures at UHF Frequencies
F. Hjeij, C. Dalmay, B. Bessette, G. Begaud, A. Bessaudou, P. Blondy, M.O. Jauberteau, F. Lalloue, C. Baristiran Kaynak, M. Kaynak, W. Gamal, C. Palego, A. Pothier
Proc. IEEE MTT-S International Microwave Symposium (IMS 2017), 533 (2017)
(Analytics for High-K)

(27) Biological Cell Discrimination Based on Their High Frequency Dielectrophoretic Signatures at UHF Frequencies
F. Hjeij, C. Dalmay, B. Bessette, G. Begaud, A. Bessaudou, P. Blondy, M.O. Jauberteau, F. Lalloue, C. Baristiran Kaynak, M. Kaynak, W. Gamal, C. Palego, A. Pothier
Proc. IEEE MTT-S International Microwave Symposium (IMS 2017), 533 (2017)
(SUMCASTEC)

(28) An Active Balanced Up-Converter Module in InP-on-BiCMOS Technology
M. Hossain, Ch. Meliani, M.I. Schukfeh, N. Weimann, M. Lisker, V. Krozer, W. Heinrich
Proc. IEEE MTT-S International Microwave Symposium (IMS 2017), 953 (2017)
(SciFab)
This paper presents an active up-converter realized as hetero-integrated module in InP-on-BiCMOS technology. It consists of a fundamental Voltage Controlled Oscillator (VCO) in 0.25 μm BiCMOS technology and a frequency multiplier fol-lowed by double balanced Gilbert mixer cell in 0.8 μm transferred substrate (TS) InP-HBT technology, which is integrated on top of the BiCMOS MMIC. The fundamental VCO operates at 54 GHz. The module achieves a single-sideband (SSB) power up-conversion gain of 2.5 dB and -3.5 dB at 82 GHz and 106 GHz, respectively. It exhibits > 25 GHz IF bandwidth. To the knowledge of the authors, this is the first hetero-integrated module reported so far.

(29) Performance Study of a 248 GHz Voltage Controlled Hetero-Integrated Source in InP-on-BiCMOS Technology
M. Hossain, I. Ostermay, F.J. Schmueckle, J. Borngräber, Ch. Meliani, M. Lisker, B. Tillack, O. Krueger, V. Krozer, W. Heinrich
EuMA International Journal of Microwave and Wireless Technologies 9(2), 259 (2017)
(SciFab)
This paper presents the performance study of a 248 GHz voltage-controlled hetero-integrated signal source using indium phosphide (InP)-on-bipolar complementary metal-oxide-semiconductor (BiCMOS) technology. The source consists of a voltage controlled oscillator (VCO) in 0.25 mm BiCMOS technology and a frequency multiplier in 0.8 mm transferredsubstrate InP-heterojunction bipolar transistor technology, which is integrated on top of the BiCMOS monolithic microwave integrated circuit in a wafer-level based benzocyclobutene bonding process. The vertical transitions from BiCMOS to InP in
this process exhibit broadband properties with insertion losses below 0.5 dB up to 325 GHz. The VCO operates at 82.7 GHz with an output power of 6 dBm and the combined circuit delivers 29 dBm at 248 GHz with 1.22% tuning range. The phase noise of the combined circuit is 285 dBc/Hz at 1 MHz offset. The measured output return loss of the hetero-integrated source
is .10 dB within a broad frequency range. This result shows the potential of the hetero integrated process for THz frequencies.

(30) Single-Event Transient Response of Comparator Pre-Amplifiers in a Complementary SiGe Technology
A. Ildefonso, Z.E. Fleetwood, M.T. Wachter, G.N. Tzintzarov, J.D. Cressler, N.E. Lourenco, A.S. Cardoso, N.J.-H. Roche, A. Khachatrian, D. McMorrow, S.P. Buchner, J.H. Warner, P. Paki, M. Kaynak, B. Tillack
IEEE Transactions on Nuclear Science 64(1), 89 (2017)
The single-event transient (SET) response of the pre-amplification stage of two latched comparators designed using either npn or pnp silicon-germanium heterojunction bipolar
transistors (SiGe HBTs) is investigated via two-photon absorption (TPA) carrier injection and mixed-mode TCAD simulations. Experimental data and TCAD simulations showed an improved SET response for the pnp comparator circuit. 2-D raster scans revealed that the devices in the pnp circuit exhibit a reduction in sensitive area of up to 80% compared to their npn counterparts. In addition, by sweeping the input voltage, the sensitive operating
region with respect to SETs was determined. By establishing a figure-of-merit, relating the transient peaks and input voltage polarities, the pnp device was determined to have a 21.4%
improved response with respect to input voltage. This study has shown that using pnp devices is an effective way to mitigate SETs, and could enable further radiation-hardening-by-design
techniques.

(31) BiCMOS Integrated Microfluidic Packaging by Wafer Bonding for Lab-On-Chip Applications
M. Inac, M. Wietstruck, A. Göritz, B. Cetindogan, C. Baristiran Kaynak, St. Marschmeyer, M. Fraschke, T. Voss, A. Mai, M. Kaynak
Proc. 67th IEEE Electronic Components and Technology Conference (ECTC 2017), 786 (2017)
(SUMCASTEC)

(32) BiCMOS Embedded Microfluidic Technology Based on Wafer Bonding Techniques for Biosensor Applications
M. Inac, M. Wietstruck, A. Göritz, B. Cetindogan, C. Baristiran Kaynak, St. Marschmeyer, M. Fraschke, T. Voss, A. Mai, C. Palego, A. Pothier, M. Kaynak
Proc. 7. MikroSystemTechnik Kongress (MST 2017), 273 (2017)

(33) Oxide Surface Roughness Optimization of BiCMOS BEOL Wafers for 200 mm Wafer Level Microfluidic Packaging Based on Fusion Bonding
M. Inac, M. Wietstruck, A. Göritz, B. Cetindogan, C. Baristiran Kaynak, M. Lisker, A. Krueger, A. Trusch, U. Saarow, P. Heinrich, T. Voss, M. Kaynak
Proc. 19th IEEE Electronics Packaging Technology Conference (EPTC 2017), (2017)
(SUMCASTEC)

(34) 200 mm Wafer Level Graphene Transfer by Wafer Bonding Technique
M. Inac, G. Lupina, M. Wietstruck, M. Lisker, M. Fraschke, A. Mai, F. Coccetti, M. Kaynak
Proc. European Solid-State Device Research Conference (ESSDERC 2017), 216 (2017)

(35) Scanning Microwave Microscopy of Aluminum CMOS Interconnect Lines Buried in Oxide and Water
X. Jin, K. Xiong, R. Marstell, N.C. Strandwitz, J.C.M. Hwang, M. Farina, A. Göritz, M. Wietstruck, M. Kaynak
Proc. 47th European Microwave Week (EuMW 2017), 975 (2017)

(36) A 25-Gb/s Monolithically Integrated Optical Receiver with Improved Sensitivity and Energy Efficiency
H.-Y. Jung, J.-M. Lee, St. Lischke, D. Knoll, L. Zimmermann, W.-Y. Cho
IEEE Photonics Technology Letters 29(17), 1483 (2017)
(Photonics)
A high-performance integrated optical receiver is realized in photonic BiCMOS technology. The receiver includes waveguide type Ge photodetector (PD), transimpedance amplifier, single-to-differential converter, post amplifier and output buffer, all of which are monolithically implemented on a Si wafer. It achieves bit-error rate (BER) of 10−12 for 25-Gb/s 231−1 PRBS at the incident optical power of −10 dBm with energy efficiency of 1.5 pJ/bit. In addition, with the help of the accurate Ge-PD circuit model, the simulated optical receiver eye diagrams and BER performances accurately predict the measured results.

(37) 0.13-µm SiGe BiCMOS Technology with More-than-Moore Modules
M. Kaynak, M. Wietstruck, A. Göritz, S. Tolunay Wipf, M. Inac, B. Cetindogan, Ch. Wipf, C. Baristiran Kaynak
Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2017), 62 (2017)



(38) Investigation of the Composition of the Si/SiO2 Interface in Oxide Precipitates and Oxide Layers on Silicon by STEM/EELS
G. Kissinger, M.A. Schubert, D. Kot, T. Grabolla
ECS Journal of Solid State Science and Technology 6(7), N54 (2017)
(Future Silicon Wafers)
We investigated thermal oxide layers of different thickness on (100) and (111) silicon substrates by STEM/EELS to determine the stoichiometry profiles and compared these with stoichiometry profiles of plate-like and octahedral oxide precipitates in silicon. It was
found that the stoichiometry of SiOx (x = 2) cannot be reached if the oxide layer thickness is lower than 10 nm for thermal oxides grown at 900◦C. This is due to an interface layer of equal maximum slope of x for all oxide layers. The slope of x is the change in stoichiometry with position and was obtained from fitting by sigmoid functions. Similar results were found for the oxide precipitates in silicon. However, there are arguments which question the slope determined via the low loss EEL spectra and the maximum x value could be closer to 2 in reality. On a sample with an oxide layer of 13.9 nm thickness we compared stoichiometry profiles obtained from the plasmon region and the Si-K2,3 and O-K ionization edges. The width of the interface measured on stoichiometry profiles decreases with increasing energy loss and is lowest for the O-K ionization edge with a width of 1.35 nm.

(39) Investigation of the Composition of the Si/SiO2 Interface in Oxide Precipitates and Oxide Layers on Silicon by STEM/EELS
G. Kissinger, M.A. Schubert, D. Kot, T. Grabolla
ECS Journal of Solid State Science and Technology 6(7), N54 (2017)
(Aeternitas)
We investigated thermal oxide layers of different thickness on (100) and (111) silicon substrates by STEM/EELS to determine the stoichiometry profiles and compared these with stoichiometry profiles of plate-like and octahedral oxide precipitates in silicon. It was
found that the stoichiometry of SiOx (x = 2) cannot be reached if the oxide layer thickness is lower than 10 nm for thermal oxides grown at 900◦C. This is due to an interface layer of equal maximum slope of x for all oxide layers. The slope of x is the change in stoichiometry with position and was obtained from fitting by sigmoid functions. Similar results were found for the oxide precipitates in silicon. However, there are arguments which question the slope determined via the low loss EEL spectra and the maximum x value could be closer to 2 in reality. On a sample with an oxide layer of 13.9 nm thickness we compared stoichiometry profiles obtained from the plasmon region and the Si-K2,3 and O-K ionization edges. The width of the interface measured on stoichiometry profiles decreases with increasing energy loss and is lowest for the O-K ionization edge with a width of 1.35 nm.

(40) Experimental Verification of TCAD Simulation for High-Performance SiGe HBTs
J. Korn, H. Rücker, B. Heinemann
Proc. IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2017), 94 (2017)

(41) CMP Process for Wafer Backside Planarization
A. Krüger, M. Lisker, A. Trusch, A. Mai
Proc. IEEE International Conference on Planarization/CMP Technology (ICPT 2017), 296 (2017)
(MEMS Integration)

(42) A Monolithically Integrated 10GS/s Sampler with a Bandwidth of >30GHz and Jitter of <30fs in Photonic BiCMOS Technology
B. Krüger, R.E. Makon, O. Landolt, O. Hidri, T. Schweiger, E. Krune, D. Knoll, St. Lischke, J. Schulze
Proc. IEEE Custom Integrated Circuits Conference (CICC 2017), (2017)
(MOSAIC)

(43) New Overlay Measurement Technique with an I-Line Stepper Using Embedded Standard Field Image Alignment Marks for Wafer Bonding Applications
P. Kulse, K. Sasai, K. Schulz, M. Wietstruck
Proc. 33rd European Mask and Lithography Conference (EMLC 2017), SPIE Proceedings 10446, 10446OP-1 (2017)

(44) Performance Evaluation of a Silicon Waveguide for Phase-Regeneration of a QPSK Signal
E. Liebig, I. Sackey, T. Richter, A. Gajda, A. Peczek, L. Zimmermann, K. Petermann, C. Schubert
IEEE Journal of Lightwave Technology 35(6), 1149 (2017)
(SOPA ZI 1283/3-1)
In this paper a silicon-on-insulator nanorib waveguide with reverse-biased p-i-n-junction is used to experimentally demonstrate phase-sensitive amplification based on four-wave mixing
for the realization of an in-line four-level phase-regenerator. Phase regeneration of a 14-GBd quadrature phase-shift keying signal is demonstrated for the first time employing a silicon waveguide as phase sensitive amplifier. The regenerator is placed in a 1040-km dispersion-managed link and it is shown that phase noise accumulation in the transmission link can be reduced by the use of the in-line silicon-based phase-regeneration.

(45) Affinity Viscosimetry Sensor for Enzyme Free Detection of Glucose in a Micro-Bioreactor Chamber
T. Liebscher, F. Glös, A. Böhme, M. Birkholz, M. Di Vona, F. De Matteis, A.H. Foitzik
Materials Science Forum 879, 1135 (2017)
(Bioelectronics)
With the growing demand of miniaturization of cell cultivation a new approach towards measuring and sensing bio-analytes needs to be made due to the problem of small volumes (less than 150 µl) containing small amounts of analytes. Most of the available glucose sensors monitor the glucose concentration with the help of enzymes, which become very inaccurate in terms of long time measurements and uses (i.e. consumes) glucose during the measurement becoming not available anymore for the cells. Therefore we focused on applying an enzyme-free glucose sensor based on a microelectromechanical system (MEMS).

(46) High-Speed, High-Responsivity Ge Photodiode with NiSi Contacts for an Advanced Photonic BiCMOS Technology
St. Lischke, D. Knoll, D. Wolansky, M. Kroh, A. Peczek, L. Zimmermann
Proc. IEEE International Conference on Group IV Photonics (GFP 2017), 61 (2017)
(SPEED)
We will show that contacting a high-performance Ge photodiode with NiSi instead of CoSi has no negative effect. This result strongly supports the development of an advanced photonic BiCMOS process where the RF performance of SiGe HBTs can take strong benefit from the “cold” NiSi.

(47) Performance Improvement of a Monolithically Integrated Receiver Enabled by an Advanced Photonic BiCMOS Process
St. Lischke, D. Knoll, M.H. Eissa, M. Kroh, A. Peczek, A. Awny, L. Zimmermann
Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2017), 50 (2017)
(SPEED)

(48) Monolithic Photonic BiCMOS Technology for High-Speed Receiver Applications
St. Lischke, D. Knoll, Ch. Mai, A. Awny, G. Winzer, M. Kroh, K. Voigt, L. Zimmermann
Proc. International Conference on Transparent Optical Networks (ICTON 2017), TuA3.3 (2017)
(DIMENSION)
Photonic-electronic integration is a key technology to master data traffic growth and therefore an enabler of future network technologies. For some time now, a novel silicon-based photonic-electronic integration technology, photonic BiCMOS, is under development at IHP. Photonic BiCMOS is a planar technology co-integrating monolithically on a single substrate high-speed RF frontend electronics – by fully featured SiGe BiCMOS – with high-speed photonic devices such as broadband germanium detectors, modulators, and SOI nano-waveguide integrated optics. High RF capability of this electronic photonic integrated circuit (ePIC) technology is enabled by SiGe heterojunction bipolar transistors (HBTs), which are integrated with 0.25µm CMOS.
This contribution will review the integration of a key component, the germanium detector. The integration of germanium in the BiCMOS flow results in performance issues of electronic devices and of the detector itself. We shall present measures to over-come detrimental integration effects and present examples of recent receiver demonstrators that indicate the potential for monolithic high-speed receivers at 1550nm.

(49) CMP Process for (110)-Germanium Roughness Reduction
M. Lisker, A. Krüger, G. Lupina, Y. Yamamoto, A. Mai
Proc. IEEE International Conference on Planarization/CMP Technology (ICPT 2017), 279 (2017)
(Graphen)

(50) Large Scale Graphene Integration in a 200 mm Wafer Silicon Technology
M. Lisker, M. Lukosius, G. Lupina, A. Mai
Proc. Grapchina 2017, abstr. book, 98 (2017)
(Graphen)

(51) Graphene Synthesis on Ge/Si(001) Substrates
M. Lukosius, J. Dabrowski, G. Lippert, J. Kitzmann, M. Lisker, O. Fursenko, F. Akhtar, Y. Yamamoto, A. Wolff, A. Mai, T. Schroeder, G. Lupina
Proc. 10th International Conference on Silicon Epitaxy and Heterostructures (ICSI 2017), 157 (2017)

(52) Graphene Synthesis and Processing on Ge Substrates
G. Lupina, M. Lukosius, G. Lippert, J. Dabrowski, J. Kitzmann, M. Lisker, P. Kulse, A. Krüger, O. Fursenko, I. Costina, A. Trusch, Y. Yamamoto, A. Wolff, T. Schroeder, A. Mai
ECS Journal of Solid State Science and Technology 6(5), M55 (2017)
(Graphen)
We review some of the recent results obtained on the graphene synthesis on Ge(100)/Si(100) substrates by molecular beam epitaxy and wafer scale chemical vapor deposition. We outline some of the identified challenges in synthesis and present first experimental results on patterning and in-line metrology of graphene in a 200 mm wafer pilot line.

(53) High-Speed SiGe BiCMOS Technologies and Circuits
A. Mai, I. Garcia Lopez, P. Rito, R. Nagulapalli, A. Awny, M. Elkhouly, M.H. Eissa, M. Ko, A. Malignaggi, M. Kucharski, H.J. Ng, K. Schmalz, D. Kissinger
International Journal of High Speed Electronics and Systems (IJHSES) 26(1&2), 1740002 (2017)
This work reports on the development of SiGe-BiCMOS technologies for mm-wave and THz high frequency applications. We present state-of-the-art performances for different SiGe heterojunction bipolar transistor (SiGe-HBT) developments as well as the evolution of complex BiCMOS technologies. With respect to different technology generations of high-speed SiGe-BiCMOS processes at IHP we discuss selected device modifications of the SiGe-HBT to achieve high frequency performances of a complex BiCMOS technology towards the 0.5 THz regime. We show the difference of high-frequency performance difference with respect to maximum achievable transit frequencies fT and oscillation frequencies fmax in comparison to RF-CMOS technologies and depict the required increase of additional process effort for the HBT-module integration for a 0.5 THz SiGe-BiCMOS technology. Moreover different high speed circuits are presented like broadband ICs for optical communication, high frequency circuits for wireless communication at 60 and 240 GHz, mm-wave radar circuits at 60 and 120 GHz as well as THz circuits operating at 245 GHz and 500 GHz for spectroscopic applications. All reviewed circuit examples are based on the discussed 130nm-SiGe-BiCMOS technologies and show their potential for a broad range of high-speed applications.

(54) Large Scale Graphene Integration for Silicon Technologies
A. Mai, M. Lisker, M. Lukosius, G. Lupina
ECS Transactions 79(1), 3 (2017)
In this work we present process developments for the integration of graphene into a 200mm silicon technology platform. We investigated different process module developments like graphene synthesis on silicon compatible materials like germanium and a non-destructive deposition of dielectric materials on the 2D graphene sheet. Moreover, the combinations of these processes for various concepts of contacting on a full 8" wafer are considered.
Finally, we discuss certain metrology methods of a standard Si-CMOS technology and their adaption for an accurate process control of the graphene related processes. We evaluate all
processes with respect to their silicon baseline technology compatibility and discuss challenges for future developments towards the developments of large-scale integration of graphene into a silicon technology.



(55) Waferlevel-Realisierung von Facetten zur Faser-zu-Chip Kopplung für eine photonische BiCMOS-Technologie
Ch. Mai, K. Voigt, M. Fraschke, A. Trusch, St. Lischke, D. Knoll, K. Schulz, P. Kulse, L. Zimmermann
Proc. 7. MikroSystemTechnik Kongress (MST 2017), 124 (2017)
Es wird ein Waferlevel-Prozess präsentiert,  der die Herstellung einer zur Stoßkopplung geeigneten Facette für die Kopp-lung von Licht aus einer Glasfaser in einen Silizium-Wellenleiter ermöglicht. Dieser Prozess ist kompatibel zur am IHP entwickelten photonischen BiCMOS Technologie. Für TE-polarisiertes Licht wurden Koppelverluste von 2.1 dB erreicht, bei einer optischen 1 dB-Bandbreite von ca. 60 nm.

(56) Integration of Tungsten filled Annular TSV Structures for RF Applications and their Effect to Baseline 0.25 µm CMOS Transistors
St. Marschmeyer, J. Berthold, A. Krüger, M. Lisker, A. Scheit, D. Wolansky
Proc. Plasma Etch and Strip in Microtechnology (PESM 2017), (2017)




(57) Hot-Carrier Degradation in SiGe HBTs: A Physical and Versatile Aging Compact Model
C. Mukherjee, T. Jacquet, G.G. Fischer, T. Zimmer, C. Maneux
IEEE Transactions on Electron Devices 64(12), 4861 (2017)
—This paper presents a new physical compact
model for interface state creation due to hot-carrier degradation
in advanced SiGe heterojunction bipolar transistors
(HBTs). An analytical model for trap density is
developed through an accurate solution of the rate equation
describing generation and annihilation of interface traps.
The analytical aging law has been derived and implemented
in terms of base recombinationcurrent parameters in HiCuM
compact model and its accuracy has been validated against
results from long-term aging tests performed close to the
safe-operating areas of various HBT technologies. The
model implementation uses a single additional node, alike
previous implementations, thereby preserving its simplicity,
yet improving the accuracy and the physical basis of
degradation.

(58) Atomically Controlled Processing for Dopant Segregation in CVD Silicon and Germanium Epitaxial Growth
J. Murota, Y. Yamamoto, I. Costina, B. Tillack, V. Le Thanh, R. Loo, M. Caymax
ECS Transactions 79(1), 33 (2017)
High performance Si-based devices require atomically ordered interface of heterostructures and doping profiles as well as strain engineering, which is obtained by the introduction of Ge
into Si. In this work, dopant (P and B) segregation during insitu doping in CVD Si and Ge epitaxial growth is reviewed. The epitaxial growth of in-situ doped Si and Ge films either on
Si(100) or on a few nm-thick Si0.5Ge0.5/Si(100) was performed at 550°C and 350°C, respectively. In the case of P doping, the P atoms segregate to the Si and the Ge surfaces and a part of them are incorporated into the grown Si and Ge cap layers. The P segregation during Si growth is larger than that during Ge growth. In the case of B doping, the B atoms scarcely
segregate to the grown Si and Ge surface. Based on these experimental results, the in-situ doping processes are explained by the modified Langmuir-type adsorption and reaction
scheme.

(59) Dopant Segregation and Diffusion in CVD Epitaxial Grown Ge
J. Murota, Y. Yamamoto, I. Costina, F. Bärwolf, B. Tillack, V. Le Thanh, R. Loo, B. Douhard, M. Ayyad, M. Caymax
Proc. 6th International Workshop on Nanotechnology and Application (IWNA 2017), 37 (2017)

(60) Mechanism of the Key Impact of Residual Carbon Content on the Reliability of Integrated Resistive Random Access Memory Arrays
G. Niu, X. Caroixa, A. Grossi, C. Zambelli, P. Olivo, E. Perez, M.A. Schubert, P. Zaumseil, I. Costina, T. Schroeder, Ch. Wenger
Journal of Physical Chemistry C 121(12), 7005 (2017)
(Panache)
Resistive random access memories (RRAM) require high density, low power consumption and high reliability. Systematic statistic electrical, material and theoretical studies were demonstrated in this work to point out and clarify a key impact of carbon residues on the resistive switching (RS), particularly the endurance, of the integrated HfO2-based 4 kbit
RRAM array. The mechanism of the carbon atoms interacting with oxygen vacancies and serving also as filament was understood in nanoscale by performing density functional
theory (DFT) calculations. Under an oxygen-deficient environment, carbon atoms tend to fill in oxygen vacancy (V"O) sites and could form conductive filaments which require higher energy to be broken compared to the original V"O filaments. By controlling the residual carbon concentration lower than 4%, highly reliable HfO2-based integrated 4 kbit RRAM array was
achieved, which is of great interest for future nonvolatile memories.

(61) Physics-Based Modeling of SiGe HBTs with fT of 450 GHz with HICUM Level 2
A. Pawlak, B. Heinemann, M. Schröter
Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2017), 134 (2017)
(Dotseven)

(62) Electrical Study of Radiation Hard Designed HfO2-Based 1T-1R RRAM Devices
E. Perez, F. Teply, J. Schmidt, Ch. Wenger
MRS Advances 2(4), 223 (2017)
DOI: 10.1557/adv.2016.616, (Panache)
In this work the electrical performance of a radiation hard designed 1T-1R resistive random access memory (RRAM) device is investigated in DC (voltage sweep) and AC (pulsed voltage) modes. This new device is based on the combination of an Enclosed Layout Transistor (ELT) used as selector device and a TiN/ HfO2/ Ti/TiN RRAM stack used as resistive device. The high cell to cell variability in the DC mode makes it difficult to define an electrical gap between the High Resistive State (HRS) and the Low Resistive State (LRS). The strong reduction of the variability by the use of Incremental Step Pulse with Verify Algorithm (ISPVA) makes the later a mandatory programming approach. The Quantum Point Contact (QPC) model defines an energy barrier located in the rupture point of the filament in HRS. The compensation between the width and height variations of this barrier during cycling could explain the stability of HRS and LRS. The good performance of the proposed device using the ISPVA programming approach makes it a good candidate for Rad-Hard Non Volatile Memories integration.

(63) Electrical Study of Radiation Hard Designed HfO2-Based 1T-1R RRAM Devices
E. Perez, F. Teply, J. Schmidt, Ch. Wenger
MRS Advances 2(4), 223 (2017)
DOI: 10.1557/adv.2016.616, (R2RAM)
In this work the electrical performance of a radiation hard designed 1T-1R resistive random access memory (RRAM) device is investigated in DC (voltage sweep) and AC (pulsed voltage) modes. This new device is based on the combination of an Enclosed Layout Transistor (ELT) used as selector device and a TiN/ HfO2/ Ti/TiN RRAM stack used as resistive device. The high cell to cell variability in the DC mode makes it difficult to define an electrical gap between the High Resistive State (HRS) and the Low Resistive State (LRS). The strong reduction of the variability by the use of Incremental Step Pulse with Verify Algorithm (ISPVA) makes the later a mandatory programming approach. The Quantum Point Contact (QPC) model defines an energy barrier located in the rupture point of the filament in HRS. The compensation between the width and height variations of this barrier during cycling could explain the stability of HRS and LRS. The good performance of the proposed device using the ISPVA programming approach makes it a good candidate for Rad-Hard Non Volatile Memories integration.

(64) A 28 Gb/s 3-V Optical Driver with High Efficiency in a Complementary SiGe:C BiCMOS Technology
P. Rito, I. Garcia Lopez, B. Heinemann, A. Awny, A.C. Ulusoy, D. Kissinger
Proc. IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2017), 23 (2017)
In this work, a modulator driver in a 0.25 µm SiGe:C complementary BiCMOS technology with fT/fmax of 110 / 180 GHz for the npn and 95 / 140 GHz for the pnp transistor is presented. The driver is implemented following an H-bridge topology, taking advantage of the availability of the pnp HBTs, and delivers a differential output amplitude of 3 Vpp to a 50 Ω load. Clear eye diagrams up to 28 Gb/s are demonstrated. Power dissipation of the full IC is only 175 mW. To the best knowledge of the authors, the reported power efficiency of 6.4% is the highest in comparison to other state of the art drivers.

(65) Evaluation de la Fiabilite d'une Technologie SiGe 0,25µm pour Applications Spatiales
C. Robin, S. Rochette, S. Desgrez, J.L. Muraro, D. Langrez, J.-L. Roux, M. Cirillo, L. Escotte, O. Llopis, J. Graffeuil
Proc. 20th Journées Nationales Micro-Ondes (JNM 2017), 1 (2017)
(ESCC Qualification)

(66) Operation of SiGe HBTs at Cryogenic Temperatures
H. Rücker, J. Korn, J. Schmidt
Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2017), 17 (2017)
(Taranto)

(67) Characterization and Prevention of Humidity Related ALD Al2O3 Degradation
A. Rückerl, R. Zeisel, M. Mandl, I. Costina, T. Schroeder, M.H. Zoellner
Journal of Applied Physics 121, 025306 (2017)
Atomic layer deposited aluminum oxide (ALD-Al2O3) is a dielectric material, which is widely
used in organic light emitting diodes in order to prevent their organic layers from humidity related degradation. Unfortunately, there are strong hints that in some cases, ALD-Al2O3 itself is suffering from humidity related degradation. Especially, high temperature and high humidity seem to enhance ALD-Al2O3 degradation strongly. For this reason, the degradation behavior of ALD-Al2O3 films at high temperature and high humidity was investigated in detail and a way to prevent it from degradation was searched. The degradation behavior is analyzed in the first part of this paper. Using infrared absorbance measurements and X-ray diffraction, boehmite (γ-AlOOH) was identified as a degradation product. In the second part of the paper, it is shown that ALD-Al2O3 films can be effectively protected from degradation using a silicon oxide capping. The deposition of very small amounts of silicon in a molecular beam epitaxy system and an X-ray photoelectron spectroscopy investigation of the chemical bonding between the silicon and the ALD-Al2O3 surface led to the conclusion that a silicon termination of the ALD-Al2O3 surface (Al*-O-SiOx) is able to stop humidity related degradation of the underlying ALD-Al2O3 films. The third part of the paper shows that the protection mechanism of the silicon termination is probably due to the strong tendency of silicic acid to resilificate exposed ALD-Al2O3 surfaces. The protective effect of a simple silicon source on an ALD-Al2O3 surface is shown exemplary and the related chemical reactions are presented.

(68) Silicon Technology for Millimeter und Terahertz Waves
H. Rücker, B. Heinemann
Proc. 24th General Congress of International Commission for Optics (ICO-24), Tu2G-01 (2017)
(Dotseven)

(69) Tunable Dual-Mode Ring Filter based on BiCMOS embedded MEMS in V-band
P. Rynkiewicz, A.-L. Franc, F. Coccetti, S. Tolunay Wipf, M. Wietstruck, M. Kaynak, G. Prigent
Proc. Asia Pacific Microwave Conference (APMC), 124 (2017)
This paper presents the design of a fully integrated
tunable filter implemented in SiGe-BiCMOS technology. The
narrow bandpass filter (12%) is aimed at addressing two
operating frequencies at 56 GHz and 74 GHz. A synthesis is
proposed to control the nominal filter as well as tunability which
is obtained by the use of embedded MEMs. A good agreement
between electromagnetic simulation and measurement is
obtained which proves the quality of both the proposed concept
and the technological process.

(70) Résonateur Bi-Mode Accordable Intégré en Bande Millimétrique
P. Rynkiewicz, A.-L. Franc, F. Coccetti, S. Tolunay Wipf, M. Wietstruck, M. Kaynak, G. Prigent
Proc. 20th Journées Nationales Micro-Ondes (JNM 2017), (2017)

(71) Millimeter-Wave Three-State Tunable Stopband Resonator Based on Integrated MEMS
P. Rynkiewicz, A.L. Franc, Fabio. Coccetti, S. Tolunay Wipf, M. Wietstruck, M. Kaynak, G. Prigent
Proc. Asia Pacific Microwave Conference (APMC 2017), (2017)

(72) Miniaturisation de Filtres Millimetriques en Anneau par Chargement Capacitif en Technologogie CMOS 0.25 µm
P. Rynkiewicz, A.-L. Franc, F. Coccetti, M. Wietstruck, M. Kaynak, G. Prigent
Proc. 20th Journées Nationales Micro-Ondes (JNM 2017), (2017)

(73) 60 GHz Planar Filters and Transmission Lines Characterization in 0.25µm BiCMOS Technology
P. Rynkiewicz, A.-L. Franc, F. Coccetti, M. Wietstruck, M. Kaynak, G. Prigent
Proc. IEEE International Workshop of Electronics, Control, Measurement, Signals and their Applications to Mechatronics (ECMSM 2017), (2017)

(74) 1.024 Tb/s Wavelength Conversion in a Silicon Waveguide with Reverse-Biased p-i-n Junction
I. Sackey, A.Gajda A. Peczek E. Liebig L. Zimmermann K. Petermann, C. Schubert
Optics Express 25(18), 21229 (2017)
(SOPA ZI 1283/3-1)
We experimentally show an all-optical wavelength conversion of 8 × 32-GBd single-polarization 16QAM signals using a silicon nano-rib waveguide. The application of reverse biasing of the p-i-n junction of the waveguide allows a conversion efficiency of −8.5 dB with a measured 3-dB optical bandwidth of about 40 nm. Using digital coherent reception, it is shown that the receiver optical signal-to-noise ratio penalty, at a bit-error ratio of 1 × 10−3, of the wavelength-converted signals over all eight channels was less than 0.6 dB with reference to their respective back-to-back signal channels.

(75) Thermo-Optical Switching in Hybrid VO2/Si Waveguides by Lateral Displaced Microheaters
L. Sanchez, A. Rosa, A. Griol, M. Menghini, P. Homm, B. Van Bilzen, J.-P. Locquet, Ch. Mai, L. Zimmermann, P. Sanchis
Proc. IEEE International Conference on Group IV Photonics (GFP 2017), 41 (2017)

(76) Impact of Breakdown Voltage on Gamma Irradiation Effects in 0.13 µm and 0.25 µm SiGe HBTs
J. Schmidt, J. Korn, G.G. Fischer, R. Sorge
IEEE Transactions on Nuclear Science 64(4), 1037 (2017)
(Radiation)
We have investigated ionization damage by 60 Co gamma irradiation in 0.13 and 0.25µm SiGe HBTs. Both technologies feature high-speed HBTs (HS-HBT) together with high-voltage HBTs (HV-HBT). Base current degradation with increasing total irradiation dose is studied. An identical behavior of corresponding HS and HV-HBTs is found for operation in forward operation probing the emitter base junction. In reverse mode where the collector base junction is determining the base current degradation HV devices exhibit larger degradation than
their HS counterparts. The increased width of the collector-base space charge region in HV devices leads to enhanced interface recombination at the adjacent Si/Oxide interfaces and stronger base current degradation. TCAD simulations of device degradation suggest a linear relationship between total irradiation dose and radiation induced interface state densitiy Nit .

(77) SiGe HBT Technology: Future Trends and TCAD-Based Roadmap
M. Schröter, T. Rosenbaum, P. Chevalier, B. Heinemann, S. Voinigescu, E. Preisler, J. Böck, A. Mukherjee
Proceedings of the IEEE 105(6), 1068 (2017)
(Dotseven)
A technology roadmap for the electrical performance of high-speed silicon–germanium (SiGe) heterojunction bipolar transistors (HBTs) is presented based on combining the results of various 1-D, 2-D, and 3-D technology computer-aided design (TCAD) simulation tools with geometry scalable compact modeling. The latter, including all known parasitic effects,
enables the accurate determination of the figures of merit for both devices and selected benchmark circuits. The presented roadmap defines five major technology nodes with the
maximum oscillation frequency of a typical high-frequency device structure as the main device design target under the constraints of various other parameters for generating the doping profiles and for defining the lateral scaling factors. An extensive and consistent set of technology and electrical parameters is provided along with the obtained scaling rules.
The expected fabrication-related challenges and possible solutions for achieving the predicted performance are being discussed. It is hoped that the presented roadmap will be useful
not only for foundries and equipment manufacturers but also for circuit and system designers enabling better predictions of the capability of SiGe–BiCMOS process technology for new
millimeter-wave (mm-wave) and terahertz (THz) applications.

(78) A Linear Equivalent Circuit Model for Depletion-Type Silicon Microring Modulators
M. Shin, Y. Ban, B.-M. Yu, M.-H. Kim, J. Rhim, L. Zimmermann, W.-Y. Choi
IEEE Transactions on Electron Devices 64(3), 1140 (2017)
(Photonics)
We present a linear equivalent circuit model for the depletion-type Si microring modulator (MRM). Our model consists of three blocks: one for parasitic components due to interconnects and pads, one for the electrical elements of the core p-n junction, and the third for a lossy LC tank representing Si MRM optical modulation characteristics. Model parameter values are extracted from measurement of a fabricated Si MRM device. Simulated modulation characteristics with our equivalent circuit show very good agreement with measured results. Using our model, we can analyze Si MRM modulation frequency response characteristics and perform gain-bandwidth product optimization of the entire Si photonic transmitter composed of a Si MRM and electrical driver circuits.

(79) Layout vs. Schematic Check für integrierte elektronisch-photonische Schaltkreise in photonischer BiCMOS-Technologie
S. Simon, G. Winzer, P. Rito, I. Garcia Lopez, D. Petousi, L. Zimmermann, T. Mausolf
Proc. 7. MikroSystemTechnik Kongress (MST 2017), 50 (2017)
(SPEED)

(80) Structural and Optical Characterization of GaAs Nano-Crystals Selectively Grown on Si Nano-Tips by MOVPE
O. Skibitzki, I. Prieto, R. Kozak, G. Capellini, P. Zaumseil, Y. Arroyo-Rojas Dasilva, M.D. Rossell, R. Erni, H. von Känel, T. Schroeder
Nanotechnology 28, 135301 (2017)
(DFG-DACh)
We present the nanoheteroepitaxial growth of gallium arsenide (GaAs) on nano-patterned silicon (Si) (001) substrates fabricated using a CMOS technology compatible process. The selective growth of GaAs nano-crystals (NCs) was achieved at 570 °C by MOVPE. A detailed structure and defect characterization study of the grown nano-heterostructures was performed using scanning transmission electron microscopy, X-ray diffraction, micro-Raman, and micro-photoluminescence (µ-PL) spectroscopy. The results show single-crystalline, nearly relaxed GaAs NCs on top of slightly, by the SiO2-mask compressively strained Si nano-tips (NTs). Given the limited contact area, GaAs/Si nanostructures benefit from limited intermixing in contrast to planar GaAs films on Si. Even though a few growth defects (e.g. stacking faults, micro/nano-twins, etc.) especially located at the GaAs/Si interface region were detected, the nanoheterostructures show intensive light emission, as investigated by µ-PL spectroscopy. Achieving well-ordered high quality GaAs NCs on Si NTs may provide opportunities for superior electronic, photonic, or photovoltaic device performances integrated on the silicon technology platform.

(81) Radiation Tolerant RF-LDMOS Transistors, Integrated into a 0.25µm SiGe-BICMOS Technology
R. Sorge, J. Schmidt, Ch. Wipf, F. Korndörfer, F. Reimer, R. Pliquett
Proc. 11th International Hiroshima Symposium on the Development and Application of Semiconductor Tracking Detectors (HSTD11), (2017)
(strahlungsfeste Schaltkeise (Radiation))

(82) Hybrid-Waveguide Ring Resonator for Biochemical Sensing
P. Steglich, C. Villringer, S. Pulwer, F. Heinrich, J. Bauer, B. Dietzel, Ch. Mai, A. Mai, M. Casalboni, S. Schrader
IEEE Sensors Journal 17(15), 4781 (2017)
This paper proposes a hybrid-waveguide ring resonator for on-chip biochemical sensing. Consisting of a low-loss strip-waveguide and a highly sensitive slot-waveguide integrated
in a silicon photonic platform, it combines advantages of both waveguide types. In this way, it provides the unique feature to increase the sensitivity while maintaining low optical losses. Thus, this resonator structure may represent a promising alternative approach for future integrated biochemical sensing applications. This is suggested by a theoretical analysis, involving numerical simulation of the hybrid-waveguide ring resonator and an
optimization of the slot-waveguide structure with regard to lightanalyte-interaction. It is demonstrated that the hybrid-waveguide concept may overcome limitations in terms of overall resonator sensitivity, which is described by a figure of merit, connecting the optical losses with the resonator sensitivity.

(83) Towards High Frequency Heterojunction Transistors: Electrical Characterization of N-Doped Amorphous Silicon-Graphene Diodes
C. Strobel, C.A. Chavarin, J. Kitzmann, G. Lupina, Ch. Wenger, M. Albert, J.W. Bartha
Journal of Applied Physics 121, 245302 (2017)
(FFLEXCOM (D020))
N-type doped amorphous hydrogenated silicon (a-Si:H) is deposited on top of graphene (Gr) by means of very high frequency plasma-enhanced chemical vapor deposition (VHF-PECVD). In order to preserve the structural integrity of the monolayer graphene, a plasma excitation frequency of 140 MHz was applied during the a-Si:H deposition. Raman spectroscopy results indicate the absence of a defect peak in the graphene spectrum after the VHF-PECVD of (n)-a-Si:H. The diode junction between (n)-a-Si:H and graphene was characterized using temperature dependent current-voltage (IV) and capacitance-voltage (CV) measurements, respectively. We demonstrate that the current at the (n)-a-Si:H-graphene interface is dominated by thermionic emission and recombination in the space charge region. The Schottky barrier height (qΦB), derived by temperature dependent IV-characteristics, is about 0.4 eV. We have demonstrated that (n)-a-Si:H-graphene junctions are a promising technology approach for high frequency heterojunction transistors.

(84) Micro-Electromechanical Affinity Sensor for the Monitoring of Glucose in Bioprocess Media
L. Theuer, M. Lehmann, S. Junne, P. Neubauer, M. Birkholz
International Journal of Molecular Sciences 18(6), 1235 (2017)
(Bioelectronics)
An affinity-viscometry-based micro-sensor probe for continuous glucose monitoring was
investigated with respect to its suitability for bioprocesses. The sensor operates with glucose and dextran competing as binding partner for concanavalin A, while the viscosity of the assay scales with glucose concentration. Changes in viscosity are determined with a micro-electromechanical system (MEMS) in the measurement cavity of the sensor probe. The study aimed to elucidate the interactions between the assay and a typical phosphate buffered bacterial cultivation medium. It turned out that contact with the medium resulted in a significant long-lasting drift of the assay’s viscosity at zero glucose concentration. Adding glucose to the medium lowers the drift by a factor of eight. The cglc values measured off-line with the glucose sensor for monitoring of a bacterial cultivation were similar to the measurements with an enzymatic assay with a difference of less than ± 0.15 g . L-1. We propose that lectin agglomeration, the electro-viscous effect, and constitutional
changes of concanavalin A due to exchanges of the incorporated metal ions may account for the
observed viscosity increase. The study has demonstrated the potential of the MEMS sensor to
determine sensitive viscosity changes within very small sample volumes, which could be of interest
for various biotechnological applications.

(85) Effect of Wafer-Level Silicon Cap Packaging on BiCMOS Embedded RF-MEMS Switch Performance
S. Tolunay Wipf, A. Göritz, M. Wietstruck, M. Cirillo, Ch. Wipf, K. Zoschke, M. Kaynak
Proc. IMAPS Nordic & IEEE CPMT Nordic Conference on Microelectronics Packaging (NordPac 2017), 129 (2017)
(ESA-RFMEMS)
In this paper, the effect of silicon (Si) cap packaging on the BiCMOS embedded RF–MEMS switch performance is studied. The RF–MEMS switches are designed and fabricated in a 0.25 μm SiGe BiCMOS technology for K–band (18 – 27 GHz) applications. The packaging is done based on a wafer– to–wafer bonding technique and the RF–MEMS switches are electrically characterized before and after the Si cap packaging. The experimental data shows the effect of the wafer–level Si cap package on the C–V and S–parameter measurements. The performed 3D FEM simulations proves that the low resistive Si cap, specifically 1 ohm.cm, results in a significant RF performance degradation of the RF–MEMS switch in terms of  insertion loss.

(86) 240 GHz RF-MEMS Switch in a 0.13 μm SiGe BiCMOS Technology
S. Tolunay Wipf, A. Göritz, Ch. Wipf, M. Wietstruck, A. Burak, E. Türkmen, Y. Gürbüz, M. Kaynak
Proc. IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM 2017), 54 (2017)
This paper presents an RF-MEMS switch fabricated in a 0.13 μm SiGe BiCMOS process  technology for 240 GHz applications. The fabricated RF-MEMS switch provides a high  capacitance Con/Coff ratio of 8.78 and beyond state of the art RF performances, 0.44 dB of insertion loss and 24.6 dB of isolation at 240 GHz. The return loss is better than 9.6 dB over the J-band (220 – 325 GHz). To the best of the authors’ knowledge, the results achieved in this study are the lowest insertion loss and the highest isolation of a Single-Pole Single-Throw (SPST) switch reported at 240 GHz.

(87) Electromagnetic and Small-Signal Modeling of an Encapsulated RF-MEMS Switch for D-Band Applications
S. Tolunay Wipf, A. Göritz, M. Wietstruck, Ch. Wipf, B. Tillack, A. Mai, M. Kaynak
EuMA International Journal of Microwave and Wireless Technologies 9(6), 1271 (2017)
(Nanotec)
In this work, an electromagnetic (EM) model and a small-signal (lumped-element) model of a wafer level encapsulated (WLE) RF-MEMS switch is presented. The EM model of the WLE RF-MEMS switch is developed to estimate its RF performance. After the fabrication of the switch the EM model is used to get accurate S-parameter simulation results. Alternative to the EM model the small-signal model of the fabricated WLE RF-MEMS switch is developed and integrated into a 0.13 μm SiGe BiCMOS process technology design kit for fast simulations and to predict the RF performance of the switch from a pure electrical point of view. The 0.13 μm SiGe BiCMOS embedded WLE RF-MEMS shows beyond state of the art measured RF performances in D-Band (110-170 GHz) and provides a high capacitance Con / Coff ratio of 11.1. The results of the both EM model and small-signal model of the switch are in very good agreement with the S parameter measurements in D-band. The measured maximum isolation of the WLE RF-MEMS switch is 51.6 dB at 142.8 GHz with an insertion loss of 0.65 dB. The fabricated switch shows better than 0.67 dB insertion loss and more than 16 dB isolation in all D-band.

(88) Packaged BiCMOS Embedded RF–MEMS Test Vehicles for Space Applications
S. Tolunay Wipf, A. Göritz, M. Wietstruck, M. Cirillo, Ch. Wipf, W. Winkler, M. Kaynak
Proc. 47th European Microwave Week (EuMW 2017), 320 (2017)
(ESA-RFMEMS)
This paper presents RF–MEMS test vehicles: Single–Pole Single–Throw (SPST), Single–Pole Double–Throw (SPDT) switches and high–voltage generators integrated with SPST switches that are designed and fabricated in IHPs 0.25 μm SiGe BiCMOS technology for K–band (18 – 27 GHz) space applications. All the fabricated RF–MEMS test vehicles are packaged by a wafer–to–wafer packaging technique. The fabricated RF–MEMS test vehicles are electrically characterized on 8–inch wafer level and the experimental data clearly shows the high yield of the packaged RF–MEMS test vehicles; thus promising for prototyping and volume production.

(89) BiCMOS-integrierte HF-MEMS-Technologien
S. Tolunay Wipf, A. Göritz, M. Wietstruck, Ch. Wipf, M. Kaynak
Proc. 7. MikroSystemTechnik Kongress (MST 2017), 109 (2017)
(Nanotec)
Novel communication system technologies demand not only miniaturization but also multifunctionality. From this perspective, RF–MEMS devices are promising candidates to add functionality into future RF systems. With their low insertion–loss, high isolation, high linearity and near–zero power consumption [1], there is a growing need and interest in RF–MEMS switches for both RF and mm–wave applications in the recent years. This need is expected to increase tremendously in the near future with more applications operating at mm–wave frequencies.
IHP has developed two BiCMOS embedded RF–MEMS switch technologies for two different technology lines, namely the 0.25 μm and the 0.13 μm SiGe BiCMOS lines. In both technologies, RF–MEMS Single–Pole Single–Throw (SPST) and Single–Pole Double–Throw (SPDT) switches are realized. Two different types of packaging technologies are developed and applied individually. In this paper, the development and the performances of the SPST and SPDT RF–MEMS switches together with two different packaging options are summarized and discussed.
The RF–MEMS switch module is initially embedded into IHPs 0.25 μm SiGe BiCMOS technology using the Back–End–Of–Line (BEOL) metallization layers [2]. After the MEMS releasing process, the RF–MEMS cavities are sealed with the silicon (Si) caps at wafer–level [3]. Fig. 1 shows the generic cross section of the packaged 0.25 μm BiCMOS technology RF–MEMS switch. Based on the 0.25 μm SiGe BiCMOS technology RF–MEMS module, RF–MEMS switches for K–band are designed, fabricated and packaged. The micrograph of K–band RF–MEMS switches are shown in Fig. 2 before and after the Si cap packaging. Additionally, the K–band (18 – 27 GHz) RF–MEMS switch is used as a standard building block for an RF–MEMS SPDT switch (Fig. 3). The S–parameter measurement results of the fabricated SPDT switch in 0.25 μm BiCMOS technology are shown in Fig. 4 and show a loss of 1.8 dB and an isolation of 12.4 dB at 25.5 GHz.
The second integration of RF–MEMS switches is done into a 0.13 μm BiCMOS process. IHPs 0.13 μm SiGe BiCMOS process represents one of the fastest currently available SiGe heterojunction bipolar transistor (HBT) technology with peak fT/ fmax values of 300 GHz/ 500 GHz [4]; thus opening potential markets for SiGe BiCMOS technologies (i.e. imaging systems at 94 and 140 GHz). Compared to the 0.25 μm BiCMOS technology, the BEOL metallization stack of the 0.13 μm BiCMOS technology includes 7 metal layers instead of 5; hence a different integration scheme is used (Fig. 5). For the packaging, a thin film wafer–level encapsulation approach is developed using the standard BiCMOS fabrication steps during the BEOL fabrication process. Fig. 6 shows the fabricated wafer–level encapsulated (WLE) RF–MEMS switch in the 0.13 μm SiGe BiCMOS process, developed for the D–Band (110–170 GHz) applications [5]–[6]. Besides, a 140 GHz RF–MEMS based SPDT switch (Fig. 7) has been successfully demonstrated in D–band, with its measured 1.42 dB insertion loss (IL) and 54.5 dB isolation at 140 GHz (Fig. 8) [7].

(90) BiCMOS-integrierte HF-MEMS-Technologien
S. Tolunay Wipf, A. Göritz, M. Wietstruck, Ch. Wipf, M. Kaynak
Proc. 7. MikroSystemTechnik Kongress (MST 2017), 109 (2017)
(ESA-RFMEMS)
Novel communication system technologies demand not only miniaturization but also multifunctionality. From this perspective, RF–MEMS devices are promising candidates to add functionality into future RF systems. With their low insertion–loss, high isolation, high linearity and near–zero power consumption [1], there is a growing need and interest in RF–MEMS switches for both RF and mm–wave applications in the recent years. This need is expected to increase tremendously in the near future with more applications operating at mm–wave frequencies.
IHP has developed two BiCMOS embedded RF–MEMS switch technologies for two different technology lines, namely the 0.25 μm and the 0.13 μm SiGe BiCMOS lines. In both technologies, RF–MEMS Single–Pole Single–Throw (SPST) and Single–Pole Double–Throw (SPDT) switches are realized. Two different types of packaging technologies are developed and applied individually. In this paper, the development and the performances of the SPST and SPDT RF–MEMS switches together with two different packaging options are summarized and discussed.
The RF–MEMS switch module is initially embedded into IHPs 0.25 μm SiGe BiCMOS technology using the Back–End–Of–Line (BEOL) metallization layers [2]. After the MEMS releasing process, the RF–MEMS cavities are sealed with the silicon (Si) caps at wafer–level [3]. Fig. 1 shows the generic cross section of the packaged 0.25 μm BiCMOS technology RF–MEMS switch. Based on the 0.25 μm SiGe BiCMOS technology RF–MEMS module, RF–MEMS switches for K–band are designed, fabricated and packaged. The micrograph of K–band RF–MEMS switches are shown in Fig. 2 before and after the Si cap packaging. Additionally, the K–band (18 – 27 GHz) RF–MEMS switch is used as a standard building block for an RF–MEMS SPDT switch (Fig. 3). The S–parameter measurement results of the fabricated SPDT switch in 0.25 μm BiCMOS technology are shown in Fig. 4 and show a loss of 1.8 dB and an isolation of 12.4 dB at 25.5 GHz.
The second integration of RF–MEMS switches is done into a 0.13 μm BiCMOS process. IHPs 0.13 μm SiGe BiCMOS process represents one of the fastest currently available SiGe heterojunction bipolar transistor (HBT) technology with peak fT/ fmax values of 300 GHz/ 500 GHz [4]; thus opening potential markets for SiGe BiCMOS technologies (i.e. imaging systems at 94 and 140 GHz). Compared to the 0.25 μm BiCMOS technology, the BEOL metallization stack of the 0.13 μm BiCMOS technology includes 7 metal layers instead of 5; hence a different integration scheme is used (Fig. 5). For the packaging, a thin film wafer–level encapsulation approach is developed using the standard BiCMOS fabrication steps during the BEOL fabrication process. Fig. 6 shows the fabricated wafer–level encapsulated (WLE) RF–MEMS switch in the 0.13 μm SiGe BiCMOS process, developed for the D–Band (110–170 GHz) applications [5]–[6]. Besides, a 140 GHz RF–MEMS based SPDT switch (Fig. 7) has been successfully demonstrated in D–band, with its measured 1.42 dB insertion loss (IL) and 54.5 dB isolation at 140 GHz (Fig. 8) [7].

(91) RF Pad Optimization for a 140 GHz RF-MEMS Switch
S. Tolunay Wipf, A. Göritz, M. Wietstruck, Ch. Wipf, M. Kaynak
Novel Technologies for Microwave and Millimeter Wave Devices and Circuits (Series in Micro and Nanoengineering ; 25), Romanian Academy Press, 17 (2017)
(Nanotec)

(92) Towards THz High Data-Rate Communication: A 50 GHz Gbps All-Electronic Wireless Link at 240 GHz
P.R. Vazquez, J. Grzyb, N. Sarmah, U.R. Pfeiffer, B. Heinemann
Proc. 4th ACM International Conference on Nanoscale Computing and Communication (ACM NanoCom 2017), 25 (2017)
(Dotseven)

(93) Optical Recombination and Non-Radiative Carrier Dynamics in Heavy Doped Ge/Si Layers
M. Virgilio, M.R. Barget, Y. Yamamoto, L.-W. Nien, W.M. Klesse, T. Schroeder, G. Capellini
Proc. 10th International Conference on Silicon Epitaxy and Heterostructures (ICSI 2017), 79 (2017)
(Ge Laser)

(94) Tight Focus Toward the Future: Tight Material Combination for Millimeter-Wave RF Power Applications: InP HBT SiGe BiCMOS Heterogeneous Wafer-Level Integration
N. Weimann, V. Krozer, W. Heinrich, M. Lisker, A. Mai, B. Tillack
IEEE Microwave Magazine 18(2), 74 (2017)
(SciFab)
The push to conquer the sparsely used electromagnetic spectrum between 100 and 1000 GHz, commonly known as the mm-wave and sub-mm-wave regions, is now in full force. An early indicator of growth of activity is the number of published articles in this area, which has been growing strongly since the year 2005. The current rapid development of electronic circuits and subsystems beyond 100 GHz is enabled not only by technological advances in high-frequency semiconductor technology and packaging techniques, but – perhaps equally important – by the commercial availability of test equipment covering the frequency bands up to 1000 GHz. In this article, we highlight recent advances in heterogeneous semiconductor material chip integration for application towards the mm-wave frequency bands.

(95) 200 mm Siliziumwafer mit vergrabenen 3D-Ätzstoppschichten für flexible Via-Middle TSVs in CMOS/BiCMOS Technologien
M. Wietstruck, St. Marschmeyer, T. Voss, M. Inac, M. Lisker, A. Krüger, D. Wolansky, P. Kulse, K. Schulz, J. Katzer, A. Göritz, A. Mai, M. Kaynak
Proc. 7. MikroSystemTechnik Kongress (MST 2017), 329 (2017)

(96) Accurate Depth Control of Through-Silicon Vias by Substrate Integrated Etch Stop Layers
M. Wietstruck, St. Marschmeyer, M. Lisker, A. Krüger, D. Wolansky, P. Kulse, M. Inac, T. Voss, A. Mai, M. Kaynak
Proc. 67th IEEE Electronics Components and Technology Conference (ECTC 2017), 53 (2017)

(97) SiGe BiCMOS Heterogeneous Integration Using Wafer Bonding Technologies
M. Wietstruck, M. Kaynak, A. Mai
Proc. 232nd ECS Meeting, (2017)

(98) SiGe BiCMOS Heterogeneous Integration Using Wafer Bonding Technologies
M. Wietstruck, M. Kaynak, A. Mai
ECS Transactions 80(4), 135 (2017)
In this paper the potential of temporary and permanent wafer
bonding techniques for heterogeneous integration of a high
performance SiGe BiCMOS technology with additional More than
Moore devices and technology modules is demonstrated.
Temporary and permanent wafer bonding process techniques are
introduced and the combination of wafer bonding with an available
BiCMOS environment is explained. Two different application
examples namely BiCMOS embedded Through-Silicon Vias
(TSV) and BiCMOS embedded microfluidics are presented to
show the potential of wafer bonding for BiCMOS heterogeneous
integration. By the use of temporary and permanent wafer bonding
new applications in the area of heterogeneous integration becomes
feasible making SiGe BiCMOS technologies more attractive for
future smart system applications.

(99) Through-Silicon Via Process Module with Backside Metallization and Redistribution Layer within a 130 nm SiGe BiCMOS Technology
M. Wietstruck, St. Marschmeyer, M. Lisker, A. Krueger, D. Wolansky, P. Kulse, A. Göritz, M. Inac, T. Voss, A. Mai, M. Kaynak
Proc. 19th IEEE Electronics Packaging Technology Conference (EPTC 2017), (2017)

(100) High Voltage Level Shifter for RF-MEMS Control Matrix with Very Low DC Current Leakage
Ch. Wipf, R. Sorge
Proc. IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2017), 15 (2017)
(MEMS Integration)

(101) High Voltage Level Shifter for RF-MEMS Control Matrix with Very Low DC Current Leakage
Ch. Wipf, R. Sorge
Proc. IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2017), 15 (2017)
(LDMOS)

(102) Wide Range Tuning of Titanium Nitride Sheet Resistance for Thin Film Resistors
D. Wolansky
Proc. IEEE International Interconnect Technology Conference (IITC 2017), (2017)

(103) Photoluminescence of Phosphorus Doped Ge on Si (100)
Y. Yamamoto, M.R. Barget, G. Capellini, N. Taoka, M. Virgilio, P. Zaumseil, A. Hesse, T. Schroeder, B. Tillack
Materials Science in Semiconductor Processing 70, 111 (2017)
Photoluminescence (PL) of selectively grown phosphorus (P) doped germanium (Ge) is investigated. 350–600 nm thick P-doped Ge is grown on 100 nm thick P-doped Ge buffer layer, which is annealed at 800 °C before the main part of Ge deposition. In the case of Ge deposited at 325 °C, approximately two times higher PL intensity is observed by P doping of ~3.2×1019 cm−3. Further increase of PL intensity by a factor of 1.5 is observed by increasing the growth temperature from 325 °C to 400 °C due to improved crystal quality. Varying
PH3 partial pressure at 400 °C, red shift of the PL occurred with increasing P concentration due to higher bandgap narrowing. With increasing P concentration up to ~1.4×1019 cm−3 at 400 °C the PL peak intensity increases by filling electrons into the L valley and decreases due to enhanced point defect concentration and degraded crystallinity. By post-annealing at 500–800 °C, the PL intensity is further increased by a factor of 2.5 because of increased active P concentration and improved crystal quality. Reduced direct bandgap energy by introducing tensile strain is also observed.

(104) A Self-Ordered, Body-Centered Tetragonal Superlattice of SiGe Nanodot Growth by Reduced Pressure CVD
Y. Yamamoto, P. Zaumseil, G. Capellini, M.A. Schubert, A. Hesse, M. Albani, R. Bergamaschini, F. Montalenti, T. Schroeder, B. Tillack
Nanotechnology 28, 485303 (2017)
Self-ordered three-dimensional body-centered tetragonal (BCT) SiGe nanodot structures are
fabricated by depositing SiGe/Si superlattice layer stacks using reduced pressure chemical vapor deposition. For high enough Ge content in the island (>30%) and deposition temperature of the Si spacer layers (T>700 °C), we observe the formation of an ordered array with islands arranged in staggered position in adjacent layers. The in plane periodicity of the islands can be selected by a suitable choice of the annealing temperature before the Si spacer layer growth and of the SiGe dot volume, while only a weak influence of the Ge concentration is observed. Phasefield simulations are used to clarify the driving force determining the observed BCT ordering, shedding light on the competition between heteroepitaxial strain and surface-energy minimization in the presence of a non-negligible surface roughness.

(105) Fully Coherent Ge Islands Growth on Si Nano-Pillars by Selective Epitaxy
Y. Yamamoto, P. Zaumseil, M.A. Schubert, G. Capellini, F. Montalenti, T. Schroeder, B. Tillack
Materials Science in Semiconductor Processing 70, 30 (2017)
Our recent experimental results of Ge nanoheteroepitaxy (NHE) on Si nanopillars (NPs) are reviewed to confirm the possibility of relaxed Ge growth on Si without misfit dislocations (MDs) formation by elastic deformation. Selective Ge growth is performed by using reduced pressure chemical vapor deposition (CVD) on two types of Si NPs with thermal SiO2 or CVD SiO2 sidewalls and on Si nanoislands (NIs) on SiO2. By using thermal SiO2 sidewall, compressive strain is generated in the Si pillar and fixed by the thermal SiO2. This results in an
incoherent Ge growth on Si NPs due to MD formation. By using CVD SiO2 sidewall, tensile strain formation due to thermal expansion during prebake for Ge epi process is observed. However, strain in Si due to Ge growth is not dominant. By introducing a Si0.5Ge0.5 buffer layer, no MD and stacking faults are observed by cross section TEM. The shape of Ge on Si NPs becomes more uniform due to improved crystal quality. On Si NIs on SiO2, a clear compliance effect is observed after Ge growth. Coherent growth of Ge on Si is also realized on Si NIs by
using Si0.5Ge0.5 buffer.

(106) Abrupt SiGe and Si Profile Fabrication by Introducing Carbon Delta Layer
Y. Yamamoto, P. Zaumseil, M.A. Schubert, A. Hesse, J. Murota, B. Tillack
ECS Journal of Solid State Science and Technology 6(8), P531 (2017)


High quality and steep Si/Si0.5Ge0.5/Si profile is fabricated by introducing a C delta layer at the interface using reduced pressure chemical vapor deposition system. The Si0.5Ge0.5 and Si layers are deposited by H2-SiH4-GeH4 at 500°C and H2-Si2H6 at 500°C to 575°C, respectively. By introducing a C delta layer at the surface, roughening of the Si0.5Ge0.5 surface is maintained at 575°C due to suppressed surface migration of Si and Ge as well as defect injection into the Si0.5Ge0.5 layer resulting in high crystallinity Si cap layer growth. Adsorbed CH3 species at the surface are preventing the epitaxial Si cap layer growth at 500°C, but it is possible to deposit high quality epitaxial Si at higher temperature because of hydrogen-desorption from adsorbed CH3. Interdiffusion of Si and Ge at the interface is observed at 525°C in the case of sample without C delta layers, but the interdiffusion is suppressed even at 575°C by introducing C delta layers.


(107) Photoluminescence of Phosphorus Atomic Layer Doped Ge
Y. Yamamoto, L.-W. Nien, G. Capellini, I. Costina, M.A. Schubert, P. Zaumseil, A. Hesse, J. Murota, T. Schroeder, B. Tillack
Proc. 10th International Conference on Silicon Epitaxy and Heterostructure (ICSI 2017), 81 (2017)

(108) Photoluminescence of Phosphorus Atomic Layer Doped Ge Grown on Si
Y. Yamamoto, L.-W. Nien, G. Capellini, I. Costina, M.A. Schubert, W. Seifert, S.A. Srinivasan, R. Loo, G. Scappucci, D. Sabbagh, A. Hesse, J. Murota, T. Schroeder, B. Tillack
Semiconductor Science and Technology 32, 104005 (2017)
Improvement of photoluminescence (PL) of Phosphorus (P) doped Ge by P atomic layer doping (ALD) is investigated. Fifty P delta layers (DL) of 8×1013 cm-2 separated by 4 nm Ge spacer are deposited at 300oC on a 700 nm thick P-doped Ge buffer layer of 1.4×1019 cm-3. A high P concentration region of 1.6×1020 cm-3 with abrupt P delta profiles is formed by the P-ALD process. Compared to the P-doped Ge buffer layer, a reduced PL intensity is observed, which might be caused by a higher density of point defects in the P delta doped Ge layer. The peak position is shifted by ~0.1 eV towards lower energy, indicating an increased active carrier concentration in the P-delta doped Ge layer. By introducing an annealing at 400oC to 500oC after each Ge spacer deposition, P desorption and diffusion is observed resulting in relatively uniform P profiles of ~2×1019 cm-3. Increased PL intensity and red shift of the PL peak are observed due to improved crystallinity and higher active P concentration.

(109) Self-Ordered Body-Centered SiGe Nanodot Growth by Reduced Pressure CVD
Y. Yamamoto, P. Zaumseil, G. Capellini, A. Hesse, M. Albani, F. Montalenti, T. Schroeder, B. Tillack
Proc. 10th International Conference on Silicon Epitaxy and Heterostructures (ICSI 2017), 135 (2017)

(110) A 260-GHz Differential Amplifier in SiGe HBT Technology
D. Yoon, M.-G. Seo, K. Song, M. Kaynak, B. Tillack, J.-S. Rieh
Electronics Letters 53(3), 194 (2017)
akzeptiertes paperA 260-GHz amplifier in a SiGe heterojunction bipolar transistor (HBT)
technology is reported. It is based on three-stage differential cascode topology and adopts a passive shunt transistor pair at the output of each amplifying stage to relax instability caused by parasitic base inductance of amplifying transistor pair. The instability of the amplifier
can be mitigated by tuning the base bias voltage of the shunt transistor pair. Peak gain of the amplifier was measured as 15 dB at 260 GHz. DC power dissipation is 112 mW. The chip occupies 300 × 160 μm2 excluding Baluns and probing pads.

(111) 300-GHz Direct and Heterodyne Active Imagers Based on 0.13-µm SiGe HBT Technology
D. Yoon, J. Kim, J. Yun, M. Kaynak, B. Tillack, J.-S. Rieh
IEEE Transactions on Terahertz Science and Technology 7(5), 536 (2017)
300-GHz direct and heterodyne imagers based on a 0.13-μm SiGe HBT technology were developed for active imaging applications in this work. The direct imager, which is based on the square-law principle, shows a maximum responsivity of 6121 V/W and a minimum noise equivalent power (NEP) of 21.2 pW/Hz1/2 at 315 GHz. The heterodyne imager, which consists of a mixer, a local oscillator, an IF amplifier, and an IF detector, exhibits a maximum responsivity of 322 kV/W and a minimum NEP of 3.9 pW/Hz1/2  at 300 GHz. Total dc power consumption of the direct imager is 0.6 mW, while the heterodyne imager consumes 21 mW. The chip areas of the direct and heterodyne imagers including the on-chip antenna are 460 × 410 and 610 × 610 μm2, respectively. To compare the performance of the two types of imagers for imaging applications, images from both imagers were acquired and compared with various output power levels of the signal source. It was demonstrated that the heterodyne imager shows much better image quality, especially when the signal source power is not sufficiently high.

(112) Influence of Dynamic Power Dissipation on Si MRM Modulation Characteristics
B.-M. Yu, M. Shin, M.-H. Kim, L. Zimmermann, W.-Y. Choi
Chinese Optics Letters 15(7), 071301 (2017)
(DIMENSION)
We experimentally observe that Si micro-ring modulator (MRM) modulation characteristics are strongly influenced by the modulation data rate and the data pattern and determine this influence is due to the temperature increase caused by dynamic power dissipation within the Si MRM device. We also quantitatively determine the amount of Si MRM resonance wavelength shift due to different modulation data rates, data patterns, and modulation voltages. Our results should be of great help for achieving reliable and optimal modulation characteristics
for Si MRMs.

(113) Influence of Dynamic Power Dissipation on Si MRM Modulation Characteristics
B.-M. Yu, M. Shin, M.-H. Kim, L. Zimmermann, W.-Y. Choi
Chinese Optics Letters 15(7), 071301 (2017)
(SPEED)
We experimentally observe that Si micro-ring modulator (MRM) modulation characteristics are strongly influenced by the modulation data rate and the data pattern and determine this influence is due to the temperature increase caused by dynamic power dissipation within the Si MRM device. We also quantitatively determine the amount of Si MRM resonance wavelength shift due to different modulation data rates, data patterns, and modulation voltages. Our results should be of great help for achieving reliable and optimal modulation characteristics
for Si MRMs.

(114) Influence of Dynamic Power Dissipation on Si MRM Modulation Characteristics
B.-M. Yu, M. Shin, M.-H. Kim, L. Zimmermann, W.-Y. Choi
Chinese Optics Letters 15(7), 071301 (2017)
(Photonics)
We experimentally observe that Si micro-ring modulator (MRM) modulation characteristics are strongly influenced by the modulation data rate and the data pattern and determine this influence is due to the temperature increase caused by dynamic power dissipation within the Si MRM device. We also quantitatively determine the amount of Si MRM resonance wavelength shift due to different modulation data rates, data patterns, and modulation voltages. Our results should be of great help for achieving reliable and optimal modulation characteristics
for Si MRMs.

(115) Influence of Dynamic Power Dissipation on Si MRM Modulation Characteristics
B.-M. Yu, M. Shin, M.-H. Kim, L. Zimmermann, W.-Y. Choi
Chinese Optics Letters 15(7), 071301 (2017)
(PHRESCO)
We experimentally observe that Si micro-ring modulator (MRM) modulation characteristics are strongly influenced by the modulation data rate and the data pattern and determine this influence is due to the temperature increase caused by dynamic power dissipation within the Si MRM device. We also quantitatively determine the amount of Si MRM resonance wavelength shift due to different modulation data rates, data patterns, and modulation voltages. Our results should be of great help for achieving reliable and optimal modulation characteristics
for Si MRMs.

(116) A Monolithically Integrated Si Optical Single-Sideband Modulator
B. Yu, J. Lee, Ch. Mai, St. Lischke, L. Zimmermann, W. Choi
Proc. IEEE International Conference on Group IV Photonics (GFP 2017), 165 (2017)
We demonstrate a monolithically integrated Si optical single-sideband modulator that contains a ring-assisted Mach-Zehnder modulator, two MMI optical couplers, and an electrical quadrature hybrid coupler. The modulator successfully produces 30-GHz single sideband with 15-dB suppression of the undesired sideband.

(117) Fast In-Situ X-Ray Analysis of Ni Silicide Formation
P. Zaumseil, D. Wolansky
Physica Status Solidi B 254(7), 1600859 (2017)
(Aeternitas)
Metal silicides are the preferred contact materials for metal-oxide semiconductor (MOS) structures. With further technology development, the materials changed within the
last decades toward lower resistivity and lower thermal budget. Currently NiSi partly further stabilized with Pt or Pd is the material of choice. The understanding of phase transformation processes and structural features is of great importance for production process optimization. Here we present a fast laboratory-based in situ X-ray diffraction method with two different experimental arrangements (Bragg–Brentano and grazing incidence) optimized concerning
the materials texture. Its application is demonstrated for the transformation of Ni to different Ni silicide phases starting with a 46 nm thick Ni layer sputtered on a Si(001) substrate and covered with TiN. Activation energies for the Ni to Ni2Si (1.55 0.13) eV and the Ni2Si to NiSi transition (1.30 0.15) eV are measured by repeating fast diffraction scans over a limited angular range under isothermal conditions and analyzing the diffraction peak height versus
time.

(118) X-Ray Investigation of Strained Epitaxial Layer Systems by Reflections in Skew Geometry
P. Zaumseil
Journal of Applied Crystallography 50, 475 (2017)
Four different SiGe/Si layer structures, pseudomorphically grown and (partially) relaxed, are used as examples to demonstrate that reflections in symmetric skew geometry can successfully be used to realize a complex analysis of these systems. Taking the intensity exactly along the truncation rod of a reciprocal lattice point, it is possible to simulate this diffraction curve and determine the layer parameter in the projection according to the netplane tilt relative to the surface. The main precondition for this technique and for performing reciprocal space mapping with sufficiently high resolution is a low angular divergence of the incident and detected beams perpendicular to the diffraction plane, which can also be
achieved by suitable optical elements on laboratory-based diffractometers.

(119) Fast In-Situ X-Ray Analysis of Ni Silicide Formation
P. Zaumseil, D. Wolansky
Physica Status Solidi B 254(7), 1600859 (2017)
(Dotseven)
Metal silicides are the preferred contact materials for metal-oxide semiconductor (MOS) structures. With further technology development, the materials changed within the
last decades toward lower resistivity and lower thermal budget. Currently NiSi partly further stabilized with Pt or Pd is the material of choice. The understanding of phase transformation processes and structural features is of great importance for production process optimization. Here we present a fast laboratory-based in situ X-ray diffraction method with two different experimental arrangements (Bragg–Brentano and grazing incidence) optimized concerning
the materials texture. Its application is demonstrated for the transformation of Ni to different Ni silicide phases starting with a 46 nm thick Ni layer sputtered on a Si(001) substrate and covered with TiN. Activation energies for the Ni to Ni2Si (1.55 0.13) eV and the Ni2Si to NiSi transition (1.30 0.15) eV are measured by repeating fast diffraction scans over a limited angular range under isothermal conditions and analyzing the diffraction peak height versus
time.

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