Prof. Gadi Eisenstein receives “Wolfgang Mehr Fellowship Award”

Applications until 31st of July to the association “Friends of IHP e.V.”

Applications until 11th of June to the association “Friends of IHP e.V.”

Funding of the Health Technologies Research Alliance for a further four years

Security chips are essential for many providers of electronic devices, from small personal devices to automobiles. They perform cryptographic operations and are intended to prevent manipulations, malfunctions or accidents. These chips should be open, flexibly adaptable and, as far as possible, mathematically proven to be secure. For global value chains with numerous actors, the supply of such cost-efficient components represents a great challenge. Open source processors offer a versatile alternative, as long as their security can be guaranteed via circuit design tools (EDA - Electronic Design Automation). A joint research project is working on this, dubbed “Hardening the value chain through open source, trustworthy EDA tools and processors (HEP)”, which is funded by the German Federal Ministry of Education and Research (BMBF) as part of the “Trustworthy Electronics” initiative.  Trustworthiness and security are important in electronics. Their importance increases the more areas of everyday life are influenced by digitization and automation - such as driving a car or working in the smart home office. But how can these requirements be fulfilled when the individual components come from different manufacturers along a global value chain? In order to find answers to this, the German Federal Ministry of Education and Research (BMBF) launched the “Trustworthy Electronics (ZEUS)” funding initiative. By researching, developing and using trustworthy electronics, a contribution is made to technical sovereignty in Germany and Europe. To support this endeavor, a project consortium led by the Leibniz Institute for Innovative Microelectronics (IHP) is working on open source approaches for the design of computer chips: The HEP project, which was officially launched on March 1, 2021, aims to implement essential parts of the value chain of security-relevant chips through open source technologies. The next generation of hardware The focus of the HEP project is on RISC-V processors. RISC-V is a new, open and free instruction set architecture, describing how the processor can be used. RISC-V is considered as a promising open source standard for many areas of application. The aim of the project is to develop a hardened, formally verified RISC-V processor that can accelerate cryptographic operations with special hardware structures.The hardening of the chip aims to reduce the potential for physical attacks on the system as much as possible. The modifiability of a verified RISC-V processor will enable secure applications for the Internet of Things and, for example, to establish a new standard in the automotive industry. Therefore, the project will also develop and implement extensions for open-source circuit design tools - so-called EDA tools - that integrate hardening measures into the circuits in an automated way.  In addition, the project investigates how hardware Trojans can be added during design or production and which protective measures are possible against such attacks. In the project, the Leibniz Institute for High Performance Microelectronics (IHP) focuses on the physical design of RISC-V processors. The aim of the cross-departmental research activities is the appropriate combination of design verification and selective hardening of the system in order to take "a big step towards the design automation of highly critical systems in the industrial environment", as Dr.-Ing. Markus Ulbricht, leader of the Fault Tolerant Computing group at IHP, explains.  Industrial Liaison Group pursues further development - also in small and medium-sized companies The demonstrator that the project consortium is working on will subsequently be used in industrial practice. For this purpose, an industrial liaison group will be established, in which the project partners will pursue the industry-oriented further development of the results. In addition to expanding expertise in IT hardware for the automotive industry and in the Internet of Things, the HEP project also aims to support small and medium-sized enterprises: Open-source processors will not only make it easier to enter the market, but will also ensure diversified value creation and supply chains, to reduce dependencies and strengthen competitiveness. The HEP project is led by the Leibniz Institute for High Performance Microelectronics (IHP). The project partners are: • IAV GmbH Ingenieursgesellschaft Auto und Verkehr• Elektrobit Automotive GmbH• German Research Center for Artificial Intelligence GmbH (DFKI)• Fraunhofer Institute for Secure Information Technology (SIT)• RheinMain University of Applied Sciences, Research Area "Smart Systems for People and Technology" (SSMT)• Ruhr University Bochum, Chair for Security Engineering• Technical University of Berlin, Department Security in Telecommunications Associated partners are CARIAD SE (A Volkswagen Group Com

DFG approves new priority program in the field of network infrastructure

IHP invites students from grade 7. Still free places available for girls!

IHP scientists win Leibniz Founding Award 2021

Artificial Intelligence (AI) is increasingly determining all of our lives and offers great potential for Germany's economic and innovative strength. However, the high energy consumption of AI technologies must be reduced. In order to promote new ideas for energy-saving chips, the Federal Ministry of Education and Research (BMBF) therefore initiated the pilot innovation competition “Energy-efficient AI systems”. For this reason, the German Federal Ministry of Education and Research (BMBF) initiated the pilot innovation competition "Energy-efficient AI systems" to promote new ideas for energy-saving chips. The task was to develop a chip that manages to detect cardiac arrhythmias and atrial fibrillation in ECG data with at least 90 percent accuracy while consuming the least energy. The competition is one of three competitions initiated as a radar of ideas in the run-up to the establishment of the BMBF's Agency that supports Breakthrough Innovations. The agency is intended to be a flexible and rapid state funding instrument that supports and accelerates bringing the highly innovative ideas into the market. In the ASIC 130 nanometer category (Application-Specific Integrated Circuit), the team from Friedrich-Alexander University Erlangen-Nuremberg and the team from the Fraunhofer Institute IIS Erlangen came out on top in the competition with the project: "Low-Power Low-Memory Low-Cost ECG Signal Analysis with ML Algorithms (Lo3-ML)".  In the project, the long-term partners of the Leibniz Institute for Innovative Microelectronics (IHP) developed a chip that uses non-volatile memories, so-called RRAMs - a technology developed by the IHP - as well as ultra-low-power circuits for writing and reading. This approach allows data to be recorded while the AI algorithm is inactive. To process the data, the algorithm is activated very quickly to complete its task in an extremely short time. In this way, the chip achieves energy savings of up to 95 percent compared to systems that are permanently active. The technology platform developed by IHP was one of three technology platforms used in the competition, along with the FPGA architecture solution and the process developed by GlobalFoundries. Further information also available at: FAU press release; BMBF press release

The demonstration of electroluminescence at terahertz frequencies from a silicon and germanium-based device represents a significant step towards the coveted milestone of a silicon-based laser