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Virtual GaN substrates on Si wafers

Engineered Wafer Systems and Hybrid Devices for System-on-Chip (SoC) Solutions

Fig. 1: Scaling in Si-based CMOS technologies according to Moore`s law in its original (red) and corrected (blue) version from 1965 and 1975, respectively.

“More than Moore”

 

Miniaturization ("scaling") is the primary mean of integrated device makers (IDM`s) to increase the performance of Silicon (Si) - based integrated circuitries (IC`s). This engineering approach is best expressed by the well-known Moore´s law depicted in Fig. 1. The Intel founder G. Moore stated in 1965 that the number of components in IC`s doubles each 12 months (red line) but corrected the time interval in 1975 (blue line) to a period of 24 months [4]. Despite all challenges, IDM`s succeeded over the last three decades to closely follow this "corrected" prediction of G. Moore from 1975. "More of Moore" is the powerful slogan on which the Fig. 1: Scaling in Si-based CMOS technologies according to Moore`s law in its original (red) and corrected (blue) version from 1965 and 1975, respectively. "International Technology Roadmap for Semiconductors (ITRS)" is based, according to which major R&D activities of all major IDM`s are strictly coordinated [5,6]. 

 

Less popular, however, is Rock´s law stating that the price of semiconductor processing tools doubles almost each four years. With IDM`s paving nowadays the way from Si-based micro- to nanoelectronics, semiconductor processing tool suppliers must fulfil more and more stringent requirements (feature size, reliability etc). The term "manufacturing science" was coined to address the very challenging tasks, process tool developers have to face in the era of Si-based nanoelectronics. In consequence, with tool costs exploding on the way towards more aggressively scaled Si-based device generations, technologically feasible IC solution becomes economically more and more challenging. This situation gives room for alternative approaches in semiconductor industry which are summarized under the expression "More than Moore". The "More than Moore" strategy is based on the use of conventional, not ultimately scaled IC technologies whose functionality and / or performance is increased by "system-on-chip (SoC)" solutions. For example, multiple core processors in the world of CMOS are a typical SoC solution brought about by system and circuit cleverness. An important materials science approach with a high potential for future SoC solutions is the integration of functional, alternative semiconductor layers on the Si technology platform, as outlined in the following [7].

The building and the infrastructure of the IHP were funded by the European Regional Development Fund of the European Union, funds of the Federal Government and also funds of the Federal State of Brandenburg.