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PANACHE

Pilot line for advanced nonvolatile memory technologies for automotive microcontrollers, high security applications and general electronics

Objective

The PANACHE project objective is to set-up a pilot line for embedded Flash technology design and manufacturing platform for the prototyping of innovative μcontrollers in Europe. The main goal is to build the basic blocks of the technology node after 40nm; with the ambition to achieve a prototyping maturity for a new BEOL based nonvolatile memory architecture suitable with the 28 nm node.

IHP's Contribution

  • Development of robust HfO2 based RRAM technology
  • Feasibility study towards scaled RRAM cells
  • Providing CMOS Platform for HfO2 based ALD technologies

Funding

ENIAC und BMBF (Grant No. 16ES0251)

Project Partners

  • STMicroelectronics
  • Bosch
  • Gemalto
  • Thales Communications & Security
  • ASM
  • Adixon Vacuum Products
  • LiveU
  • CEA-LETI
  • CNRS-LTM
  • TU Darmstadt
  • Universitat Autonoma de Barcelona
  • IMA
  • UTIA
  • Tubitak
  • Sabanci University
  • Inovent Coop.
The building and the infrastructure of the IHP were funded by the European Regional Development Fund of the European Union, funds of the Federal Government and also funds of the Federal State of Brandenburg.