Modular Processor Library
MPL
Objective
The project is used internally to develop a library of verified and re-usable modules based on the IHP BiCMOS (SiGe:C) technology. The focus are low-power processors and multi-processor solutions for high performance wireless communication systems. Further emphasis is placed on radiation-hard components for applications in space.
Additional design support is given to customers in developing reliable systems in short time.
Motivation
The MPL project will enable powerful and competitive system-on-chip solutions which can be implemented very flexible and very fast according to actual market requirements.
Project Partners
German Aerospace Center (radiation-hard processor)- Aeroflex Gaisler AB (Leon processor cores and components)
- Genesys Ltd., Ukraine (memory generators)
- Humboldt University of Berlin (PCB designs)
- IHP GmbH (chip production and measurement)
- Cadence Design Systems Inc. (simulation, layout design)
- Mentor Graphics Inc. (simulation, layout design)
- Perforce Software Inc. (version control management)
- Synopsys Inc. (net list synthesis)
