Sub-Contract

The wireless transmission of large amounts of data as e.g. uncompressed video signals within a short period of time makes high demands on communication systems. A challenge in this project is the enormous bandwidth of more than 2 GHz at frequencies around 60 GHz.

Furthermore, analog components and the digital signal processing have to be capable to transfer data with up to 10 Gbit/s. In contrast to previous narrowband systems, the research work in this project reaches the limits of technical feasibility. Oversampling of the analog signals for example is not feasible with currently available AD- and DA-converters. The hardware platform of the digital signal processing consists of one or several FPGAs.

The research activities of the chair for Integrated Systems within the EASY-A project focus on:

The analysis and design of components of the digital baseband
The interface between analog Front-End, digital Front-End and digital baseband
The specifications of the analog Front-End

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Sub-Projects Sub-Project BMW Sub-Project EADS-IW Sub-Project FhG-HHI Sub-Project FhG-IAF Sub-Contractor Humboldt-Uni Berlin Sub-Project IHP Sub-Project IMST Sub-Project Infineon Sub-Project MEDAV Sub-Project Meytec Sub-Contractor Ruhr-Uni Bochum Sub-Project Siemens Sub-Project TELEFUNKEN Sub-Project TES Sub-Contractor TU Berlin Sub-Project TU Dresden Sub-Contractor TU Ilmenau Sub-Project Universität Ulm	Ruhr-Universität Bochum Chair of Integrated Systems Prof. Dr.-Ing. Attila Bilgic Universitätsstrasse 150 44801 Bochum www.is.ruhr-uni-bochum.de Sub-Contract The wireless transmission of large amounts of data as e.g. uncompressed video signals within a short period of time makes high demands on communication systems. A challenge in this project is the enormous bandwidth of more than 2 GHz at frequencies around 60 GHz. Furthermore, analog components and the digital signal processing have to be capable to transfer data with up to 10 Gbit/s. In contrast to previous narrowband systems, the research work in this project reaches the limits of technical feasibility. Oversampling of the analog signals for example is not feasible with currently available AD- and DA-converters. The hardware platform of the digital signal processing consists of one or several FPGAs. The research activities of the chair for Integrated Systems within the EASY-A project focus on: The analysis and design of components of the digital baseband The interface between analog Front-End, digital Front-End and digital baseband The specifications of the analog Front-End