Sub-Project: Multi-functional Frontend-ICs in cost-efficient Si/SiGe HBT technology for Ultra-High-Rate Cordless

Ulm University' Competence Center on Integrated Circuits in Communications concentrates its efforts on the implementation of the UHR-C demonstrator, where it contributes multifunctional analog ICs for the frontend. The target technology is predominantly the TELEFUNKEN Si/SiGe heterojunction bipolar technology, which will be improved as part of the EASY-A project. The main emphasis of our work is on the receiver.

The solution of the design problem requires the following steps:

Together with TELEFUNKEN Semiconductors , approaches will be researched to increase the cutoff frequencies of the commercially available SiGe2RF process sufficiently to allow the use in short-range communications systems at 60 GHz. This shall be done by lateral and vertical structural modifications. For the optimized transistor structures and for the passive components, suitable models have to be developed to allow designs at 60 GHz .
Significant cost advantages compared to existing solutions shall be achieved by a significantly increased degree of on-chip integration. This necessitates an in-depth study of parasitic on-chip interactions at 60 GHz, with the aid of special test structures. Coupling effects which cannot be eliminated must be modeled appropriately .
Starting with existing IP blocks up to 50 GHz, functional blocks will be optimized for use at 60 GHz and modified for use with the improved transistor structures .
The intended full multifunctional integration of the frontend will be targeted via two intermediate steps of lower complexity, which can already be used in early prototypes. Most likely, these blocks will be an integration of VCO and frequency divider, and the integration of a mixer and a frequency multiplier, or a subharmonically pumped mixer with quadrature output .
Circuit topologies will be investigated to demodulate simple modulation schemes (e.g. QPSK) in hardware, lowering the baseband processing effort and with it the power consumption.
Ulm University will also contribute towards module integration .

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Sub-Projects Sub-Project BMW Sub-Project EADS-IW Sub-Project FhG-HHI Sub-Project FhG-IAF Sub-Contractor Humboldt-Uni Berlin Sub-Project IHP Sub-Project IMST Sub-Project Infineon Sub-Project MEDAV Sub-Project Meytec Sub-Contractor Ruhr-Uni Bochum Sub-Project Siemens Sub-Project TELEFUNKEN Sub-Project TES Sub-Contractor TU Berlin Sub-Project TU Dresden Sub-Contractor TU Ilmenau Sub-Project Universität Ulm	Ulm University Competence Center on Integrated Circuits in Communications Prof. Dr.-Ing. Hermann Schumacher Albert-Einstein-Allee 45 89081 Ulm http://www-ebs.e-technik.uni-ulm.de Sub-Project: Multi-functional Frontend-ICs in cost-efficient Si/SiGe HBT technology for Ultra-High-Rate Cordless Ulm University' Competence Center on Integrated Circuits in Communications concentrates its efforts on the implementation of the UHR-C demonstrator, where it contributes multifunctional analog ICs for the frontend. The target technology is predominantly the TELEFUNKEN Si/SiGe heterojunction bipolar technology, which will be improved as part of the EASY-A project. The main emphasis of our work is on the receiver. The solution of the design problem requires the following steps: Together with TELEFUNKEN Semiconductors , approaches will be researched to increase the cutoff frequencies of the commercially available SiGe2RF process sufficiently to allow the use in short-range communications systems at 60 GHz. This shall be done by lateral and vertical structural modifications. For the optimized transistor structures and for the passive components, suitable models have to be developed to allow designs at 60 GHz . Significant cost advantages compared to existing solutions shall be achieved by a significantly increased degree of on-chip integration. This necessitates an in-depth study of parasitic on-chip interactions at 60 GHz, with the aid of special test structures. Coupling effects which cannot be eliminated must be modeled appropriately . Starting with existing IP blocks up to 50 GHz, functional blocks will be optimized for use at 60 GHz and modified for use with the improved transistor structures . The intended full multifunctional integration of the frontend will be targeted via two intermediate steps of lower complexity, which can already be used in early prototypes. Most likely, these blocks will be an integration of VCO and frequency divider, and the integration of a mixer and a frequency multiplier, or a subharmonically pumped mixer with quadrature output . Circuit topologies will be investigated to demodulate simple modulation schemes (e.g. QPSK) in hardware, lowering the baseband processing effort and with it the power consumption. Ulm University will also contribute towards module integration .