CALADAN

Micro assembled Terabit/s capable optical transceivers for Datacom applications

Objective

In the past ten years we have witnessed the rapid emergence and introduction of internet- and cloud-based software applications such as e-commerce, e-governance, e-health, video-on-demand, massive online-gaming and social media as well as internet search machines, etc. in our society. Behind the scenes all of these software applications run on large data processing centers at warehouse scale. The amount of data and calculations which must be processed by these data processing centers is still growing exponentially. The expected introduction of technologies for 5G, artificial intelligence (AI) and Internet-of-Things (IoT) will mount further pressure on the data processing centers.

CALADAN addresses in particular the communication connections within the data processing centers which connect the individual servers with one another. Within a period of five to ten years the industry expects a demand for fiber-optic transceivers with capacities near or even higher than 1 terabit/s. Momentarily, no known solution can offer such band widths at reasonable costs and energy consumption.

IHP's Contribution

IHP will prepare a 130 nm SiGe BiCMOS technology for the transfer print. For this, the process must be executed on a so-called SOI-handle-wafer. For the separating layer a buried BOX (buried oxide) layer is required. The silicon layer of the SOI wafer must have the same chemical and electrical characteristics as the standard wafer in bulk. The thickness must be adjusted in such a way that there is no impact on the components (transistors, resistors, etc.) in comparison to the original SiGe-BiCMOS process.

The minimum area of the produced chiplets (target size is ~ 300 x 200 µm2) will be an important goal. Based on these specifications, four different circuits will be designed and manufactured: a PAM-4 modulator driver with 56 Gbit/s, a linear transfer impedance amplifier with 56 Gbit/s, a 64 Gbit/s modulator driver with 16 ADPSK and a differential linear transfer impedance amplifier with 64 Gbit/s.

Funding

The CALADAN project is an initiative of the Photonics Public Private Partnership and is financed within the framework of the H2020-ICT call.

Project Partners

  • Interuniversitair Micro-​Electronica Centrum
  • University College Cork - National University of Ireland, Cork
  • X-​Celeprint Limited
  • Innolume GmbH
  • Mellanox Technologies Ltd. – MLNX
  • Xilinx Ireland Unlimited Company
  • ficonTEC Service GmbH
  • EV Group E. Thallner GmbH

External Links

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