Publications 2021

Script list Publications

(1)
Monitoring of Particle Count Rate and LET Variations with Pulse Stretching Inverters

M. Andjelkovic, J.-C. Chen, A. Simevski, O. Schrape, M. Krstic, R. Kraemer
IEEE Transactions on Nuclear Science 68(8), 1772 (2021)
DOI: 10.1109/TNS.2021.3076400, (REDOX)
This study investigates the use of pulse stretching (skew-sized) inverters for monitoring the variation of count rate and linear energy transfer (LET) of energetic particles. The basic particle detector is a cascade of two pulse stretching inverters, and the required sensing area is obtained by connecting up to 12 two-inverter cells in parallel and employing the required number of parallel arrays. The incident particles are detected as single-event transients (SETs), whereby the SET count rate denotes the particle count rate, while the SET pulsewidth distribution depicts the LET variations. The advantage of the proposed solution is the possibility to sense the LET variations using fully digital processing logic. SPICE simulations conducted on IHP’s 130-nm CMOS technology have shown that the SET pulsewidth varies by approximately 550 ps over the LET range from 1 to 100 MeV ⋅  cm2 ⋅  mg−1 . The proposed detector is intended for triggering the fault-tolerant mechanisms within a self-adaptive multiprocessing system employed in space. It can be implemented as a standalone detector or integrated in the same chip with the target system.

(2) Standard Delay Cells with Improved Tolerance to Single Event Transients
M. Andjelkovic, C. Calligaro, O. Schrape, U. Gatti, F.A. Kuentzer, M. Krstic
Proc. 32nd International Conference on Microelectronics (MIEL 2021), 329 (2021)
(MORAL)

(3) Standard Delay Cells with Improved Tolerance to Single Event Transients
M. Andjelkovic, C. Calligaro, O. Schrape, U. Gatti, F.A. Kuentzer, M. Krstic
Proc. 32nd International Conference on Microelectronics (MIEL 2021), 329 (2021)
(ELICSIR)

(4) A Tunable Single Event Transient Filter Based on Digitally Controlled Capacitive Delay Cells
M. Andjelkovic, O. Schrape, A. Breitenreiter, J.-C. Chen, M. Krstic
Proc. 34th IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS 2021), (2021)
(ELICSIR)

(5) Edge Computing for 5G Networks
D. Artunedo, B. Sayadi, P. Bisson, J.P. Wary, H. Lonsethagen, C. Anton-Haro, A. Oliva, A. Kaloxylos, J. Cosmas, R. Muller, B. Meunier, Y. Zhang, X. Zhang, J. Mangues, C. Bernardos, X. Li, Q. Wang, M. Barros, A. Werbrouck, J. Gutierrez Teran, M. Molla, M. Lorenzo, D. Warren, V. Frascolla, F. Setaki, D. Tsolkas, G. Xiloutis, H. Koumaras, M. Muehleisen, A. Heider, K. Trichias, G. Tzanettis, K. Katsaros, L. Zanzi, G. Carrozzo, B. Al-Jammal, A. Gopalasingham, A. Fornés Leal, M. Iordache, S. Kuklinski, L. Tomaszewski, D. Breitgand, P. Giaccone, P.S. Yanez-Mingot, C. Papagianni, G. Tsolis, C. Tselios, J. Cosmas, D. Levi, K. Trichias, H. Khalili, P.S. Khodashenas
5GPPP Technology Board (2021)
DOI: 10.5281/zenodo.3698117, (5G-PICTURE)

(6) 5G-VICTORI: Optimizing Media Streaming in Mobile Environments using mmWave, NBMP and 5G Edge Computing
L. Bassbouss, M.B. Fadhel, S. Pham, A. Chen, S. Steglich, E. Troudt, M. Emmelmann, J. Gutierrez Teran, N. Maletic, E. Grass, S. Schinkel, A. Wilson, S. Glaser, C. Schlehuber
Proc. 6th Workshop on 5G – Putting Intelligence to the Network Edge (5G-PINE 2021), in: IFIP Advances in Information and Communication Technology, Springer, IFIP AICT 628, 38 (2021)
DOI: 10.1007/978-3-030-79157-5_3, (IHP - Humboldt-Universität Joint-Lab)

(7) 5G-VICTORI: Optimizing Media Streaming in Mobile Environments using mmWave, NBMP and 5G Edge Computing
L. Bassbouss, M.B. Fadhel, S. Pham, A. Chen, S. Steglich, E. Troudt, M. Emmelmann, J. Gutierrez Teran, N. Maletic, E. Grass, S. Schinkel, A. Wilson, S. Glaser, C. Schlehuber
Proc. 6th Workshop on 5G – Putting Intelligence to the Network Edge (5G-PINE 2021), in: IFIP Advances in Information and Communication Technology, Springer, IFIP AICT 628, 38 (2021)
DOI: 10.1007/978-3-030-79157-5_3, (5G-VICTORI)

(8) Zuverlässigkeitsanalyse digitaler Schaltungen durch Answer Set Programming
A. Breitenreiter, O. Schrape, M. Andjelkovic, M. Krstic
Proc. 33. GI/GMM/ITG-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2021), 41 (2021)
(SPAD)

(9) Reliability Analysis in less than 200 Lines of Code
A. Breitenreiter, O. Schrape, M. Andjelkovic, M. Krstic
Proc. 12th IEEE Latin America Symposium on Circuits and System (LASCAS 2021), (2021)
DOI: 10.1109/LASCAS51355.2021.9459116, (SPAD)

(10) Support Region of µ-Law Logarithmic Quantizers for Laplacian Source Applied in Neural Networks
M. Dincic, Z. Peric, M. Tancic, D. Denic, Z. Stamenkovic, B. Denic
Microelectronics Reliability 124, 114269 (2021)
DOI: 10.1016/j.microrel.2017.12.042
The main aim of the paper is to provide effective and accurate solutions for the calculation of the support region of the μ-law logarithmic companding quantizers. A new solution for the starting point of iterative methods will be proposed, that provides very accurate value of the support region (being the main parameter needed for the design of the quantizer) only after one iteration of the iterative method. Based on this new starting point, an accurate closed-form approximate expression for the calculation of the support region will be derived, as one of the main contributions of the paper. To significantly simplify implementation of the μ-law companding quantizer, piecewise linearization is performed. A new linearization method is presented, based on the optimization of the last segments. Derivation of an accurate closed-form formula for the support region of the linearized quantizer is done, as an important contribution. The obtained linearized μ-law companding quantizer is very simple to design (due to closed-form formulas) and to implement (due to linearization), providing at the same time very high performance (due to optimization of the last segments). Due to these and other advantages (robustness, adjustability to the statistical distribution of the input signal), the proposed quantizer can be used in many topical applications, such as in receivers of 5G wireless systems or in neural networks for quantization of weights and activations. The paper provides an application of the designed quantizers for quantization of weights of a neural network, showing significant decreasing of the bit-rate compared to the standard full-precision representation (from 32 bits to just 5 bits), with the same prediction accuracy of the network.

(11) Plesiochronous Spread Spectrum Clocking with Guaranteed QoS for In-Band Switching Noise Reduction
X. Fan, M. Babic, S. Zhang, E. Grass, M. Krstic
IEEE Transactions on Circuits and Systems I 68(7), 3031 (2021)
DOI: 10.1109/TCSI.2021.3076206, (ENROL)
Spread spectrum clocking (SSC) conventionally uses frequency modulations (FM) to suppress digital switching noise in the frequency domain. While clock-FM effectively reduces spectral noise peaks, it maintains synchronous operation per cycle with the total noise unchanged. In this paper, we introduce plesiochronous design as a general applicable de-synchronization solution for the spectral switching noise optimization with guaranteed quality-ofservice. By modelling on-chip aperiodic supply current as a polycyclostationary random process, we theoretically prove that digital plesiochronous design contributes to reducing both, total and peak switching noise, in a harmonic frequency band of interest logarithmically proportional to the number of adopted clock domains over the synchronous design. A complete framework is then developed to implement the plesiochronous design with optimal clock domain partitioning and FIFO-based synchronization that features a minimum depth of six by employing Johnson encoding fully compatible with mainstream design flows. As measured on a 130nm pipelined FFT test chip across 25 dies taking process variations further into account, our plesiochronous SSC achieves on average 5.1dB total power reductions in addition to 12.8dB peak power reductions of substrate noise at the clock fundamental frequency, which match our predictions, with marginal hardware overhead in cell area and power consumption on silicon.

(12) Plesiochronous Spread Spectrum Clocking with Guaranteed QoS for In-Band Switching Noise Reduction
X. Fan, M. Babic, S. Zhang, E. Grass, M. Krstic
IEEE Transactions on Circuits and Systems I 68(7), 3031 (2021)
DOI: 10.1109/TCSI.2021.3076206, (GASEBO)
Spread spectrum clocking (SSC) conventionally uses frequency modulations (FM) to suppress digital switching noise in the frequency domain. While clock-FM effectively reduces spectral noise peaks, it maintains synchronous operation per cycle with the total noise unchanged. In this paper, we introduce plesiochronous design as a general applicable de-synchronization solution for the spectral switching noise optimization with guaranteed quality-ofservice. By modelling on-chip aperiodic supply current as a polycyclostationary random process, we theoretically prove that digital plesiochronous design contributes to reducing both, total and peak switching noise, in a harmonic frequency band of interest logarithmically proportional to the number of adopted clock domains over the synchronous design. A complete framework is then developed to implement the plesiochronous design with optimal clock domain partitioning and FIFO-based synchronization that features a minimum depth of six by employing Johnson encoding fully compatible with mainstream design flows. As measured on a 130nm pipelined FFT test chip across 25 dies taking process variations further into account, our plesiochronous SSC achieves on average 5.1dB total power reductions in addition to 12.8dB peak power reductions of substrate noise at the clock fundamental frequency, which match our predictions, with marginal hardware overhead in cell area and power consumption on silicon.

(13) 2x4 VGA-Less Bidirectional Dual-Polarization 28 GHz Beamformer in 130-nm SiGe BiCMOS
A. Franzese, N. Maletic, M.H. Eissa, R. Negra, A. Malignaggi
IEEE Microwave and Wireless Components Letters 31(8), 981 (2021)
DOI: 10.1109/LMWC.2021.3087245, (Taranto)
This letter presents a dual-polarization beamformer chip for fifth-generation (5G) applications. The chip leverages a vector-sum phase shifter (VSPS) approach and single-ended design, allowing a reduced control circuitry complexity. The use of the VSPS translates in both phase shift and gain control, as shown in the system analysis. This beamformer is suitable for four dual-polarized antennas, achieving high gain control for each element. The performance can be summarized as a 1-dB compression point of 11dBm, while having an rms phase and amplitude error lower than 0.5° and 0.4 dB, respectively, at the maximum constant magnitude gain circle. Moreover, it is shown that the design can afford tapering despite relying only on the VSPS for gain control.

(14) Research on ADC Architectures Suitable for Space Applications and Technology Scaling
E.P. Garcia, O. Schrape, A. Breitenreiter, L. Pallares, M. Krstic, M. Lopez-Vallejo
Proc. 8th International Workshop on Analogue and Mixed-Signal Integrated Circuits for Space Applications (AMICSA 2021), (2021)
(SPAD)

(15) A 112 Gb/s Radiation-Hardened Mid-Board Optical Transceiver in 130-nm SiGe BiCMOS for Intra-Satellite Links
S. Giannakopoulos, I. Sourikopoulos, L. Stampoulidis, P. Ostrovskyy, F. Teply, K. Tittelbach-Helmrich, G. Panic, G. Fischer, A. Grabowski, H. Zirath, P. Ayzac, N. Venet, A. Maho, M. Sotom, S. Jones, G. Wood, I. Oxtoby
Frontiers in Physics 9, 672941 (2021)
DOI: 10.3389/fphy.2021.672941, (SIPhoDiAS)
We report the design of a 112 Gb/s radiation-hardened (RH) optical transceiver applicable to intra-satellite optical interconnects. The transceiver chipset comprises a vertical-cavity surface-emitting laser (VCSEL) driver and transimpedance amplifier (TIA) integrated circuits (ICs) with four channels per die, which are adapted for a flip-chip assembly into a mid-board optics (MBO) optical transceiver module. The ICs are designed in the IHP 130 nm SiGe BiCMOS process (SG13RH) leveraging proven robustness in radiation environments and high-speed performance featuring bipolar transistors (HBTs) with fT/fMAX values of up to 250/340 GHz. Besides hardening by technology, radiation-hardened-by-design (RHBD) components are used, including enclosed layout transistors (ELTs) and digital logic cells. We report design features of the ICs and the module, and provide performance data from post-layout simulations. We present radiation evaluation data on analog devices and digital cells, which indicate that the transceiver ICs will reliably operate at typical total ionizing dose (TID) levels and single event latch-up thresholds found in geostationary satellites.

(16) Synchronization in 5G Networks: A Hybrid Bayesian Approach Towards Clock Offset/Skew Estimation and its Impact on Localization
M. Goodarzi, D. Cvetkovski, N. Maletic, J. Gutierrez Teran, E. Grass
EURASIP Journal on Wireless Communications and Networking 91 (2021)
DOI: 10.1186/s13638-021-01963-x, (5G-CLARITY)
Clock synchronization has always been a major challenge when designing wireless networks. This work focuses on tackling the time synchronization problem in 5G networks by adopting a hybrid Bayesian approach for clock offset and skew estimation. Furthermore, we provide an in-depth analysis of the impact of the proposed approach on a synchronization-sensitive service, i.e. localization. Specifically, we expose the substantial benefit of Belief Propagation (BP) running on Factor Graphs (FGs) in achieving precise network-wide synchronization. Moreover, we take advantage of Bayesian Recursive Filtering (BRF) to mitigate the time-stamping error in pairwise synchronization. Finally, we reveal the merit of hybrid synchronization by dividing a large-scale network into local synchronization domains and applying the most suitable synchronization algorithm (BP- or BRF-based) on each domain. The performance of the hybrid approach is then evaluated in terms of the Root Mean Square Errors (RMSEs) of the clock offset, clock skew, and the position estimation. According to the simulations, in spite of the simplifications in the hybrid approach, RMSEs of clock offset, clock skew, and position estimation remain below 10 ns, 1 ppm, and 1.5 m, respectively.

(17) Multi-Channel RF Supervision Module for Thermal Magnetic Resonance based Cancer Therapy
H. Han, E. Oberacker, A. Kuehne, S. Wang, T.W. Eigentler, E. Grass, T. Niendorf
Cancers 13(5), 1001 (2021)
DOI: 10.3390/cancers13051001, (IHP - Humboldt-Universität Joint-Lab)
Glioblastoma multiforme (GBM) is the most lethal and common brain tumor. Combining hyperthermia with chemotherapy and/or radiotherapy improves the survival of GBM patients. Thermal magnetic resonance (ThermalMR) is a hyperthermia variant that exploits radio frequency (RF)-induced heating to examine the role of temperature in biological systems and disease. The RF signals’ power and phase need to be supervised to manage the formation of the energy focal point, accurate thermal dose control, and safety. Patient position during treatment also needs to be monitored to ensure the efficacy of the treatment and avoid damages to healthy tissue. This work reports on a multi-channel RF signal supervision module that is capable of monitoring and regulating RF signals and detecting patient motion. System characterization was performed for a broad range of frequencies. Monte-Carlo simulations were performed to examine the impact of power and phase errors on hyperthermia performance. The supervision module’s utility was demonstrated in characterizing RF power amplifiers and being a key part of a feedback control loop regulating RF signals in heating experiments. Electromagnetic field simulations were conducted to calculate the impact of patient displacement during treatment. The supervision module was experimentally tested for detecting patient motion to a submillimeter level. To conclude, this work presents a cost-effective RF supervision module that is a key component for a hyperthermia hardware system and forms a technological basis for future ThermalMR applications.

(18) Reduced-Complexity Decoding Implementation of QC-LDPC Codes with Modified Shuffling
A. Hasani, L. Lopacinski, R. Kraemer
EURASIP Journal on Wireless Communications and Networking 183 (2021)
(PSSS-FEC)
Layered decoding (LD) facilitates a partially parallel architecture for performing belief propagation (BP) algorithm for decoding low-density parity-check (LDPC) codes. Such a schedule for LDPC codes has, in general, reduced implementation complexity compared to a fully parallel architecture and higher convergence rate compared to both serial and parallel architectures, regardless of the codeword length or code-rate. In this paper, we introduce a modified shuffling method which shuffles the rows of the parity-check matrix (PCM) of a quasi-cyclic LDPC (QC-LDPC) code, yielding a PCM in which each layer can be produced by the circulation of its above layer one symbol to the right. The proposed shuffling scheme additionally guarantees the columns of a layer of the shuffled PCM to be either zero weight or single weight. This condition has a key role in further decreasing LD complexity. We show that due to these two properties, the number of occupied look-up tables (LUTs) on a field programmable gate array (FPGA) reduces by about 93% and consumed on-chip power by nearly 80%, while the bit error rate (BER) performance is maintained. The only drawback of the shuffling is the degradation of decoding throughput, which is negligible for low values of Eb /Nuntil the BER of 1e−6.

(19) Power Silicon Carbide Schottky Diodes as Current Mode γ-Radiation Detectors
S. Ilic, M. Andjelkovic, M. Carvajal, A. Lallena, M. Krstic, S. Stankovic, G. Ristic
Proc. 32nd International Conference on Microelectronics (MIEL 2021), 337 (2021)
(ELICSIR)

(20) On the Complexity of Attacking Commercial Authentication Products
I. Kabin, Z. Dyka, D. Klann, J. Schäffner, P. Langendörfer
Microprocessors and Microsystems 80, 103480 (2021)
DOI: 10.1016/j.micpro.2020.103480, (Total Resilience)
In this paper we discuss the difficulties of mounting successful attack against crypto implementations when essential information is missing. We start with a detailed description of our attack against our own design, to highlight which information is needed to increase the success of an attack, i.e. we use it as a blueprint to the following attack against commercially available crypto chips. We would like to stress that our attack against our own design is very similar to what happens during certification e.g. according to Common Criteria Standard as in those cases the manufacturer need to provide detailed information. When attacking the commercial designs without signing NDAs, we needed to intensively search the Internet for information about the designs. We cannot to reveal the private keys used by the attacked commercial authentication chips 100% correctly. Moreover, the missing knowledge of the used keys does not allow us to evaluate the success of our attack. We were able to reveal information on the processing sequence during the authentication process even as detailed as identifying the clock cycles in which the individual key bits are processed. To summarize the effort of such an attack is significantly higher than the one of attacking a well-known implementation.

(21) Synthesis and Realization of Multiband Bandpass Filters Based on Frequency Transformation for the Encoding of Chipless RFID Tags
M. Khaliel, J. Wen, A. Prokscha, A. El-Awamry, A. Fawky, T. Kaiser
Proc. IEEE-APS Topical Conference on Antennas and Propagation in Wireless Communications (APWC 2021), 184 (2021)
DOI: 10.1109/APWC52648.2021.9539618

(22) Cross-Layer Digital Design Flow for Space Applications
M. Krstic, M. Andjelkovic, O. Schrape, A. Breitenreiter, J.-C. Chen, A. Balashov, A. Simevski
Proc. 32nd International Conference on Microelectronics (MIEL 2021), 45 (2021)
(Space Region)

(23) Cross-Layer Digital Design Flow for Space Applications
M. Krstic, M. Andjelkovic, O. Schrape, A. Breitenreiter, J.-C. Chen, A. Balashov, A. Simevski
Proc. 32nd International Conference on Microelectronics (MIEL 2021), 45 (2021)
(MORAL)

(24) Cross-Layer Digital Design Flow for Space Applications
M. Krstic, M. Andjelkovic, O. Schrape, A. Breitenreiter, J.-C. Chen, A. Balashov, A. Simevski
Proc. 32nd International Conference on Microelectronics (MIEL 2021), 45 (2021)
(ELICSIR)

(25) Assessing AFEDC Architecture's Robustness to Timing Faults
F.A. Kuentzer, M. Krstic
Proc. 33. GI/GMM/ITG-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2021), 43 (2021)
(ENROL)

(26) Investigation of Real-Valued Spreading Sequences for DSSS and PSSS
L. Lopacinski, N. Maletic, A. Hasani, J. Gutierrez Teran, E. Grass
Proc. 17th International Symposium on Wireless Communication Systems (ISWCS 2021), (2021)
DOI: 10.1109/ISWCS49558.2021.9562219, (PSSS-FEC)

(27) Modelling Power Amplifier Impairments in mmWave Phased-Array Systems
N. Maletic, E. Grass
Electronics Letters 57(13), 532 (2021)
DOI: 10.1049/ell2.12184, (IHP - Humboldt-Universität Joint-Lab)
This letter presents an analytical framework to study the distortion effect of power amplifiers (PA) in a single‐stream millimetre wave (mmWave) system with a radio‐frequency beamforming architecture. A third‐order nonlinearity PA model is used. The impact of PA nonlinearity on the transmitter performance is evaluated by means of its normalised mean square error. Also, the effect of PA compression on the system capacity in a line‐of‐sight channel is analysed. All analytical results are supported with Monte‐Carlo simulations.

(28) Modelling Power Amplifier Impairments in mmWave Phased-Array Systems
N. Maletic, E. Grass
Electronics Letters 57(13), 532 (2021)
DOI: 10.1049/ell2.12184, (5GENESIS)
This letter presents an analytical framework to study the distortion effect of power amplifiers (PA) in a single‐stream millimetre wave (mmWave) system with a radio‐frequency beamforming architecture. A third‐order nonlinearity PA model is used. The impact of PA nonlinearity on the transmitter performance is evaluated by means of its normalised mean square error. Also, the effect of PA compression on the system capacity in a line‐of‐sight channel is analysed. All analytical results are supported with Monte‐Carlo simulations.

(29) Real-Time Physical Layer Secure Key Generation in a mmWave Communication System
N. Manjappa, L. Wimmer, N. Maletic, E. Grass
Proc. 17th International Symposium on Wireless Communication Systems (ISWCS 2021), (2021)
DOI: 10.1109/ISWCS49558.2021.9562194, (5GENESIS)

(30) Prediction of Pest Insect Appearance using Sensors and Machine Learning
D. Markovic, D. Vujicic, S. Tanaskovic, B. Dordevic, S. Randic, Z. Stamenkovic
Sensors 21(14), 4846 (2021)
DOI: 10.3390/s21144846
The appearance of pest insects can lead to a loss in yield if farmers do not respond in a timely manner to suppress their spread. Occurrences and numbers of insects can be monitored through insect traps, which include their permanent touring and checking the condition. Another more efficient way is to set up sensor devices with a camera at the traps that will photograph the traps and forward the images into the Internet, where the insect detection will be performed based on image analysis. Weather conditions, temperature and relative humidity are the parameters that affect the appearance of some pests, such as Helicoverpa armigera. The paper presents a model of machine learning that can predict the appearance of insects during the season on a daily basis taking into account the air temperature and relative humidity. Several machine-learning algorithms for classification were applied and their accuracy in prediction of the insect occurrence was presented (up to 76.5%). Since the data used for testing were given in chronological order according to the days when the measurement was performed, the existing model was expanded to take into account the period of 3 and 5 days. The extended model showed better accuracy of confirmed insect detections and a lower percentage of false detections. In the case of a period of 5 days, the accuracy of the affected detections was 86.3%, while the percentage of false detections was 11%. The proposed model of machine learning can help farmers to detect the occurrence of pests and save the time and resources needed to check the fields.

(31) 5G-VICTORI: Future Railway Communications Requirements Driving 5G Deployments in Railways
I. Mesogiti, E. Theodoropoulou, F. Setaki, G. Lyberopoulos, A. Tzanakaki, M. Anastassopoulos, C. Politi, P. Papaioannou, C. Tranoris, S. Denazis, P. Flegkas, N. Makris, N. Maletic, D. Cvetkovski, J. Gutierrez Teran, P.K. Chartsias, K. Stamatis, M. Xezonaki, D. Kritharidis, A. Dalkalitsis, M. Taferner, M. Piovarci
Proc. 6th Workshop on 5G – Putting Intelligence to the Network Edge (5G-PINE 2021), in: IFIP Advances in Information and Communication Technology, Springer, IFIP AICT 628, 21 (2021)
DOI: 10.1007/978-3-030-79157-5_2, (5G-VICTORI)

(32) Optical Fault Injection Attacks against Radiation-Hard Registers
D. Petryk, Z. Dyka, R. Sorge, J. Schäffner, P. Langendörfer
Proc. 24th EUROMICRO Conference on Digital System Design (DSD 2021), Special Session: Architectures and Hardware for Security Applications (AHSA), 371 (2021)
DOI: 10.1109/DSD53832.2021.00062, (RESCUE)

(33) Sensitivity of Unbiased Commercial P-Channel Power VDMOSFETs to X-Ray Radiation
G. Ristic, A. Jevtic, S. Ilic, S. Dimitijevic, S. Veljkovic, A. Palma, S. Stankovic, M. Andjelkovic
Proc. 32nd International Conference on Microelectronics (MIEL 2021), 341 (2021)
(ELICSIR)

(34) Radiation and Spontaneous Annealing of Radiation-Sensitive Field-Effect Transistors with Gate Oxide Thicknesses of 400 and 1000 nm
G. Ristic, M. Andjelkovic, R. Duanne, A. Palma, A. Jaksic
Sensors and Materials 33(6), 2109 (2021)
DOI: 10.18494/SAM.2021.3425, (ELICSIR)
We investigated the influence of gamma radiation of 50 Gy(H2O) on radiation-sensitive p-channel metal-oxide-semiconductor field-effect transistors with an Al gate (RADFETs) with gate oxide thicknesses of 400 and 1000 nm and gate voltages of 0 and 5 V. The obtained results showed that the sensitivity S at a given gate voltage increases with the square of the gate oxide thickness. After irradiation (IR), spontaneous annealing (SA) was performed at room temperature without voltage at the gate. We present the behaviors of fixed traps and switching traps, determined by the midgap technique, and that of fast switching traps, determined by the charge-pumping technique, during IR and SA. A very important characteristic of dosimetric transistors is fading, which represents the recovery of the threshold voltage of the irradiated RADFETs during SA. The maximum fading is about 15% after 9100 h, except for the RADFETs  with a gate oxide thickness of 1000 nm and a gate voltage of 5 V, for which it is about 30%. A fitting equation for fading was proposed, which fitted the experimental fading values very well.

(35) Radiation Sensitive MOSFETs Irradiated with Various Positive Gate Biases
G. Ristic, S. Ilic, R. Duanne, M. Andjelkovic, A. Palma, A. Lallena, M. Krstic, S. Stankovic, A. Jaksic
Journal of Radiation Research and Applied Science 14(1), 353 (2021)
DOI: 10.1080/16878507.2021.1970921, (ELICSIR)
The RADiation sensitive metal-oxide-semiconductor Field-Effect-Transistors (RADFETs) were irradiated with gamma rays up to absorbed dose of 110 Gy(H2O). The results of threshold voltage, VT, during irradiation with various positive gate biases showed the increase in VT with gate bias. The threshold voltage shift, dVT, during irradiation was fitted very well. The contributions of both the fixed traps (FTs) and switching traps (STs) during radiation on dVT were analysed. The results show the significantly higher contribution of FTs than STs. A function that describes the dependence of threshold voltage shift and its components on gate bias was proposed, which fitted the experimental values very well. The annealing at the room temperature without gate bias of irradiated RADFETs was investigated. The recovery of threshold voltage, known as fading, slightly increase with the gate bias applied during radiation. The dVT shows the same changes as the threshold voltage component due to fixed states, dVft, while there is no change in the threshold voltage component due to switching traps, dVst.

(36) Radiation-Hardness-by-Design Latch-based Triple Modular Redundancy Flip-Flops
O. Schrape, A. Breitenreiter, C. Schulze, St. Zeidler, M. Krstic
Proc. 12th IEEE Latin America Symposium on Circuits and System (LASCAS 2021), (2021)
DOI: 10.1109/LASCAS51355.2021.9459134

(37) Mit konventioneller Technologie zum strahlungsharten AMS-Design
O. Schrape, A. Breitenreiter, L. Lu, E.P. Garcia, M. Krstic
Proc. 33. GI/GMM/ITG-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2021), 47 (2021)
(SPAD)

(38) Single Event Transients Generation and Propagation Flow using Commercial EDA Tools
S. Simoglou, C. Georgakidis, I. Lilitsis, C. Sotiriou, M. Andjelkovic, M. Krstic
Proc. 32nd International Conference on Microelectronics (MIEL 2021), 333 (2021)
(ELICSIR)

(39) Simulation of Electromagnetic Emanation of Cryptographic ICs: Tools, Methods, Problems
A. Sosa, Z. Dyka, I. Kabin, P. Langendörfer
Proc. 19th IEEE East-West Design & Test Symposium (EWDTS 2021), 12 (2021)
(Total Resilience)

(40) Application of Transimpedance Amplifiers in PIN Photodiode Dosimetry
L. Spahic, S. Ilic, M. Andjelkovic, A. Palma, G. Ristic
Proc. 32nd International Conference on Microelectronics (MIEL 2021), 317 (2021)
(ELICSIR)

(41) Silicon Systems for Wireless LAN
Z. Stamenkovic, H. Aziza, E. Sanchez, A. Bosio
Proc. 24th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2021), 157 (2021)
DOI: 10.1109/DDECS52668.2021.9417056

(42) Fault Analysis of Homogeneously and Heterogeneously Quantized Deep Neural Networks
R.T. Syed, M. Ulbricht, M. Krstic
Proc. 33. GI/GMM/ITG-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2021), 55 (2021)
(Space Region)

(43) Fault Resilience Analysis of Quantized Deep Neural Networks
R.T. Syed, M. Ulbricht, K. Piotrowski, M. Krstic
Proc. 32nd International Conference on Microelectronics (MIEL 2021), 275 (2021)
(Space Region)

(44) Digital DC Blocker Filters
K. Tittelbach-Helmrich
Frequenz: Journal of RF-Engineering and Telecommunications 75(9-10), 331 (2021)
DOI: 10.1515/freq-2020-0177, (5G-VICTORI)
This paper mathematically investigates a special kind of digital infinite-impulse response (IIR) filters, suitable for filtering out very low frequencies near zero from digital signals. We investigate the transfer functions of such filters from 1st to 3rd order and provide formulae to calculate the filter coefficients from the desired cutoff frequency.

(45) Design and Implementation Strategy of Adaptive Processor-Based Systems for Error Resilient and Power-Efficient Operation
M. Veleski, M. Hübner, M. Krstic, R. Kraemer
Proc. 24th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2021), 57 (2021)
DOI: 10.1109/DDECS52668.2021.9417023

(46) Towards Error Resilient and Power-Efficient Adaptive Multiprocessor System using Highly Configurable and Flexible Cross-Layer Framework
M. Veleski, M. Hübner, M. Krstic, R. Kraemer
Proc. 27th IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2021), (2021)
DOI: 10.1109/IOLTS52814.2021.9486695

(47) Assessing the Configuration Space of the Open Source NVDLA Deep Learning Accelerator on a Mainstream MPSoC Platform
A. Veronesi, D. Bertozzi, M. Krstic
Proc. 28th IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2020), in: IFIP Advances in Information and Communication Technology, Springer, IFIP AICT 621, 87 (2021)
DOI: 10.1007/978-3-030-81641-4_5

(48) Behavioral Model of Dot-Product Engine Implemented with 1T1R Memristor Crossbar Including Assessment
J. Wen, M. Ulbricht, E. Perez, X. Fan, M. Krstic
Proc. 24th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2021), 29 (2021)
DOI: 10.1109/DDECS52668.2021.9417070, (KI-PRO)

(49) Behavioral Simulation of Dot-Product Engine Implemented with 1T1R Memristor Crossbar Including Assessment
J. Wen, M. Ulbricht, X. Fan, M. Krstic
Proc. 33. GI/GMM/ITG-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2021), 59 (2021)
(KI-PRO)

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