Script list Publications
(1) An Energy-Efficient In-Memory Computing Architecture for Survival Data Analysis based on Resistive Switching Memories (RRAM)
A. Baroni, A. Glukhov, E. Perez, Ch. Wenger, E. Calore, S.F. Schifano, P. Olivo, D. Ielmini, C. Zambelli
Frontiers in Neuroscience 16, 932270 (2022)
DOI: 10.3389/fnins.2022.932270, (KI-IoT)
One of the objectives fostered in medical science is the so-called precision medicine, which requires the analysis of a large amount of survival data from patients to deeply understand treatment options. Tools like Machine Learning and Deep Neural Networks are becoming a de-facto standard. Nowadays, computing facilities based on the Von Neumann architecture are devoted to these tasks, yet rapidly hitting a bottleneck in performance and energy efficiency. The In-Memory Computing (IMC) architecture emerged as a revolutionary approach to overcome that issue. In this work, we propose an IMC architecture based on Resistive switching memory (RRAM) crossbar arrays to provide a convenient primitive for matrix–vector multiplication in a single computational step. This opens massive performance improvement in the acceleration of a neural network that is frequently used in survival analysis of biomedical records, namely the DeepSurv. We explored how the synaptic weights mapping strategy and the programming algorithms developed to counter RRAM non-idealities expose a performance/energy trade-off. Finally, we assessed the benefits of the proposed architectures with respect to a GPU-based realization of the same task, evidencing a tenfold improvement in terms of performance and three orders of magnitude with respect to energy efficiency.
(2) Low Conductance State Drift Characterization and Mitigation in Resistive Switching Memories (RRAM) for Artificial Neural Networks
A. Baroni, A. Glukhov, E. Perez, Ch. Wenger, D. Ielmini, P. Olivo, C. Zambelli
IEEE Transactions on Device and Materials Reliability 22(3), 340 (2022)
DOI: 10.1109/TDMR.2022.3182133, (KI-IoT)
The crossbar structure of Resistive-switching random access memory (RRAM) arrays enabled the In-Memory Computing circuits paradigm, since they imply the native acceleration of a crucial operations in this scenario, namely the Matrix-Vector-Multiplication (MVM). However, RRAM arrays are affected by several issues materializing in conductance variations that might cause severe performance degradation. A critical one is related to the drift of the low conductance states appearing immediately at the end of program and verify algorithms that are mandatory for an accurate multi-level conductance operation.
In this work, we analyze the benefits of a new programming algorithm that embodies Set and Reset switching operations to achieve better conductance control and lower variability. Data retention analysis performed with different temperatures for 168 hours evidence its superior performance with respect to standard programming approach. Finally, we explored the benefits of using our methodology at a higher abstraction level, through the simulation of an Artificial Neural Network for image recognition task (MNIST dataset). The accuracy achieved shows higher performance stability over temperature and time.
(3) Implementation of Device-to-Device and Cycle-to-Cycle Variability of Memristive Devices in Circuit Simulations
C. Bischoff, J. Leise, E. Perez-Bosch Quesada, E. Perez, Ch. Wenger, A. Kloes
Solid State Electronics 194, 108321 (2022)
DOI: 10.1016/j.sse.2022.108321, (KI-IoT)
We present a statistical procedure for the extraction of parameters of a compact model for memristive devices. Thereby, in a circuit simulation the typical fluctuations of the current-voltage (I-V) characteristics from device-to-device (D2D) and from cycle-to-cycle (C2C) can be emulated. The approach is based on the Stanford model whose parameters play a key role to integrating D2D and C2C dispersion. The influence of such variabilities over the model’s parameters is investigated by using a fitting algorithm fed with experimental data. After this, the statistical distributions of the parameters are used in a Monte Carlo simulation to reproduce the I-V D2D and C2C dispersions which show a good agreement to the measured curves. The results allow the simulation of the on/off current variation for the design of RRAM cells or memristor-based artificial neural networks.
(4) Analytical Calculation of Inference in Memristor-Based Stochastic Artificial Neural Networks
N. Bogun, E. Perez-Bosch Quesada, E. Perez, Ch. Wenger, A. Kloes, M. Schwarz
Proc. 29th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2022), 83 (2022)
DOI: 10.23919/MIXDES55591.2022.9838321, (KI-IoT)
(5) Mitigating the Effects of RRAM Process Variation on the Accuracy of Artifical Neural Networks
M. Fritscher, J. Knödtel, M. Mallah, S. Pechmann, E. Perez-Bosch Quesada, T. Rizzi, Ch. Wenger, M. Reichenbach
Proc. 21st International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2021), in: Lecture Notes in Computer Science, Springer, LNCS 13227, 401 (2022)
DOI: 10.1007/978-3-031-04580-6_27, (Total Resilience)
In this work, three different RRAM compact models implemented in Verilog-A are analyzed and evaluated in order to reproduce the multilevel approach based on the switching capability of experimental devices. These models are integrated in 1T-1R cells to control their analog behavior by means of the compliance current imposed by the NMOS select transistor. Four different resistance levels are simulated and assessed with experimental verification to account for their multilevel capability. Further, an Artificial Neural Network study is carried out to evaluate in a real scenario the viability of the multilevel approach under study.
(6) Mitigating the Effects of RRAM Process Variation on the Accuracy of Artifical Neural Networks
M. Fritscher, J. Knödtel, M. Mallah, S. Pechmann, E. Perez-Bosch Quesada, T. Rizzi, Ch. Wenger, M. Reichenbach
Proc. 21st International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2021), in: Lecture Notes in Computer Science, Springer, LNCS 13227, 401 (2022)
DOI: 10.1007/978-3-031-04580-6_27, (KI-PRO)
In this work, three different RRAM compact models implemented in Verilog-A are analyzed and evaluated in order to reproduce the multilevel approach based on the switching capability of experimental devices. These models are integrated in 1T-1R cells to control their analog behavior by means of the compliance current imposed by the NMOS select transistor. Four different resistance levels are simulated and assessed with experimental verification to account for their multilevel capability. Further, an Artificial Neural Network study is carried out to evaluate in a real scenario the viability of the multilevel approach under study.
(7) Mitigating the Effects of RRAM Process Variation on the Accuracy of Artifical Neural Networks
M. Fritscher, J. Knödtel, M. Mallah, S. Pechmann, E. Perez-Bosch Quesada, T. Rizzi, Ch. Wenger, M. Reichenbach
Proc. 21st International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2021), in: Lecture Notes in Computer Science, Springer, LNCS 13227, 401 (2022)
DOI: 10.1007/978-3-031-04580-6_27, (NeuroMem)
In this work, three different RRAM compact models implemented in Verilog-A are analyzed and evaluated in order to reproduce the multilevel approach based on the switching capability of experimental devices. These models are integrated in 1T-1R cells to control their analog behavior by means of the compliance current imposed by the NMOS select transistor. Four different resistance levels are simulated and assessed with experimental verification to account for their multilevel capability. Further, an Artificial Neural Network study is carried out to evaluate in a real scenario the viability of the multilevel approach under study.
(8) End-to-End Modeling of Variability-Aware Neural Networks based on Resistive Switching Memory Arrays
A. Glukhov, N. Lepri, V. Milo, A. Baroni, C. Zambelli, P. Olivo, E. Perez, Ch. Wenger, D. Ielmini
Proc. 30th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2022), (2022)
DOI: 10.1109/VLSI-SoC54400.2022.9939653, (KI-IoT)
(9) Statistical Model of Program/Verify Algorithms in Resistive Switching Memories for In-Memory Neural Network Accelerators
A. Glukhov, V. Milo, A. Baroni, N. Lepri, C. Zambelli, P. Olivo, E. Perez, Ch. Wenger, D. Ielmini
Proc. International Reliability Physics Symposium (IRPS 2022), 3C.3-1 (2022)
DOI: 10.1109/IRPS48227.2022.9764497, (Total Resilience)
(10) Statistical Model of Program/Verify Algorithms in Resistive Switching Memories for In-Memory Neural Network Accelerators
A. Glukhov, V. Milo, A. Baroni, N. Lepri, C. Zambelli, P. Olivo, E. Perez, Ch. Wenger, D. Ielmini
Proc. International Reliability Physics Symposium (IRPS 2022), 3C.3-1 (2022)
DOI: 10.1109/IRPS48227.2022.9764497, (KI-PRO)
(11) Statistical Model of Program/Verify Algorithms in Resistive Switching Memories for In-Memory Neural Network Accelerators
A. Glukhov, V. Milo, A. Baroni, N. Lepri, C. Zambelli, P. Olivo, E. Perez, Ch. Wenger, D. Ielmini
Proc. International Reliability Physics Symposium (IRPS 2022), 3C.3-1 (2022)
DOI: 10.1109/IRPS48227.2022.9764497, (NeuroMem)
(12) Precipitation of Suboxides in Silicon and its Impact on Gettering and Carrier Recombination
G. Kissinger, D. Kot, T. Müller, A. Sattler
Proc. 8th International Symposium on Advanced Science and Technology of Silicon Materials (JSPS Si Symposium 2022), 43 (2022)
(Future Silicon Wafers)
(13) In-Memory Principal Component Analysis by Crosspoint Array of Resistive Switching Memory: A New Hardware Approach for Energy-Efficient Data Analysis in Edge Computing
P. Mannocci, A. Baroni, E. Melacarne, C. Zambelli, P. Olivo, E. Perez, Ch. Wenger, D. Ielmini
IEEE Nanotechnology Magazine 16(2), 4 (2022)
DOI: 10.1109/MNANO.2022.3141515, (KI-IoT)
In-memory computing (IMC) is one of the most promising candidates for data-intensive computing accelerators of machine learning (ML). A key ML algorithm for dimensionality reduction and classification is the principal component analysis (PCA), which heavily relies on matrix-vector multiplications (MVM) for which classic von Neumann architectures are not optimized. Here, we provide the experimental demonstration of a new IMC-based PCA algorithm based on power iteration and deflation executed in a 4-kbit array of resistive switching randomaccess memory (RRAM). The classification accuracy of Wisconsin Breast Cancer dataset reaches 95.43%, close to floating-point implementation. Our simulations indicate a 250x improvement in energy efficiency compared to commercial graphic processing units (GPUs), thus supporting IMC for energy-efficient ML in modern data-intensive computing.
(14) In-Memory Principal Component Analysis by Crosspoint Array of Resistive Switching Memory: A New Hardware Approach for Energy-Efficient Data Analysis in Edge Computing
P. Mannocci, A. Baroni, E. Melacarne, C. Zambelli, P. Olivo, E. Perez, Ch. Wenger, D. Ielmini
IEEE Nanotechnology Magazine 16(2), 4 (2022)
DOI: 10.1109/MNANO.2022.3141515, (Neutronics)
In-memory computing (IMC) is one of the most promising candidates for data-intensive computing accelerators of machine learning (ML). A key ML algorithm for dimensionality reduction and classification is the principal component analysis (PCA), which heavily relies on matrix-vector multiplications (MVM) for which classic von Neumann architectures are not optimized. Here, we provide the experimental demonstration of a new IMC-based PCA algorithm based on power iteration and deflation executed in a 4-kbit array of resistive switching randomaccess memory (RRAM). The classification accuracy of Wisconsin Breast Cancer dataset reaches 95.43%, close to floating-point implementation. Our simulations indicate a 250x improvement in energy efficiency compared to commercial graphic processing units (GPUs), thus supporting IMC for energy-efficient ML in modern data-intensive computing.
(15) In-Memory Principal Component Analysis by Crosspoint Array of Resistive Switching Memory: A New Hardware Approach for Energy-Efficient Data Analysis in Edge Computing
P. Mannocci, A. Baroni, E. Melacarne, C. Zambelli, P. Olivo, E. Perez, Ch. Wenger, D. Ielmini
IEEE Nanotechnology Magazine 16(2), 4 (2022)
DOI: 10.1109/MNANO.2022.3141515, (Total Resilience)
In-memory computing (IMC) is one of the most promising candidates for data-intensive computing accelerators of machine learning (ML). A key ML algorithm for dimensionality reduction and classification is the principal component analysis (PCA), which heavily relies on matrix-vector multiplications (MVM) for which classic von Neumann architectures are not optimized. Here, we provide the experimental demonstration of a new IMC-based PCA algorithm based on power iteration and deflation executed in a 4-kbit array of resistive switching randomaccess memory (RRAM). The classification accuracy of Wisconsin Breast Cancer dataset reaches 95.43%, close to floating-point implementation. Our simulations indicate a 250x improvement in energy efficiency compared to commercial graphic processing units (GPUs), thus supporting IMC for energy-efficient ML in modern data-intensive computing.
(16) In-Depth Characterization of Switching Dynamics in Amorphous HfO2 Memristive Arrays for the Implementation of Synaptic Updating Rules
E. Perez, M.K. Mahadevaiah, E. Perez-Bosch Quesada, Ch. Wenger
Japanese Journal of Applied Physics 61(SM), SM1007 (2022)
DOI: 10.1109/TED.2021.3072868, (KI-IoT)
Accomplishing truly analog conductance modulation in memristive arrays is crucial in order to implement the synaptic plasticity in hardware-based neuromorphic systems. In this paper, such a feature was addressed by exploiting the inherent stochasticity of switching dynamics in amorphous HfO2 technology. A thorough statistical analysis of experimental characteristics measured in 4 kbit arrays by using trains of identical depression/ potentiation pulses with different voltage amplitudes and pulse widths provided the key to develop two different updating rules and to define their optimal programming parameters. The first rule is based on applying a specific number of identical pulses until the conductance value achieves the desired level. The second one utilized only one single pulse with a particular amplitude to achieve the targeted conductance level. In addition, all the results provided by the statistical analysis performed may play an important role in understanding better the switching behavior of this particular technology.
(17) In-Depth Characterization of Switching Dynamics in Amorphous HfO2 Memristive Arrays for the Implementation of Synaptic Updating Rules
E. Perez, M.K. Mahadevaiah, E. Perez-Bosch Quesada, Ch. Wenger
Japanese Journal of Applied Physics 61(SM), SM1007 (2022)
DOI: 10.1109/TED.2021.3072868, (Neutronics)
Accomplishing truly analog conductance modulation in memristive arrays is crucial in order to implement the synaptic plasticity in hardware-based neuromorphic systems. In this paper, such a feature was addressed by exploiting the inherent stochasticity of switching dynamics in amorphous HfO2 technology. A thorough statistical analysis of experimental characteristics measured in 4 kbit arrays by using trains of identical depression/ potentiation pulses with different voltage amplitudes and pulse widths provided the key to develop two different updating rules and to define their optimal programming parameters. The first rule is based on applying a specific number of identical pulses until the conductance value achieves the desired level. The second one utilized only one single pulse with a particular amplitude to achieve the targeted conductance level. In addition, all the results provided by the statistical analysis performed may play an important role in understanding better the switching behavior of this particular technology.
(18) In-Depth Characterization of Switching Dynamics in Amorphous HfO2 Memristive Arrays for the Implementation of Synaptic Updating Rules
E. Perez, M.K. Mahadevaiah, E. Perez-Bosch Quesada, Ch. Wenger
Japanese Journal of Applied Physics 61(SM), SM1007 (2022)
DOI: 10.1109/TED.2021.3072868, (NeuroMem)
Accomplishing truly analog conductance modulation in memristive arrays is crucial in order to implement the synaptic plasticity in hardware-based neuromorphic systems. In this paper, such a feature was addressed by exploiting the inherent stochasticity of switching dynamics in amorphous HfO2 technology. A thorough statistical analysis of experimental characteristics measured in 4 kbit arrays by using trains of identical depression/ potentiation pulses with different voltage amplitudes and pulse widths provided the key to develop two different updating rules and to define their optimal programming parameters. The first rule is based on applying a specific number of identical pulses until the conductance value achieves the desired level. The second one utilized only one single pulse with a particular amplitude to achieve the targeted conductance level. In addition, all the results provided by the statistical analysis performed may play an important role in understanding better the switching behavior of this particular technology.
(19) Activity of AC Electrokinetically Immobilized Horseradish Peroxidase
M. Prüfer, Ch. Wenger, F.F. Bier, E.-M. Laux, R. Hölzel
Electrophoresis 43(18-19), 1920 (2022)
DOI: 10.1002/elps.202200073, (exosurf)
Dielectrophoresis (DEP) is an AC electrokinetic effect mainly used to manipulate cells. Smaller particles, like virions, antibodies, enzymes and even dye molecules can be immobilized by DEP as well. In principle, it was shown that enzymes are active after immobilization by DEP, but no quantification of the retained activity was reported so far. In this study, the activity of the enzyme horseradish peroxidase (HRP) is quantified after immobilization by DEP. For this, HRP is immobilized on regular arrays of titanium nitride ring electrodes of 500 nm diameter and 20 nm widths. The activity of HRP on the electrode chip is measured with a limit of detection of 60 fg HRP by observing the enzymatic turnover of Amplex Red and H2O2 to fluorescent resorufin by fluorescence microscopy. The initial activity of the permanently immobilized HRP equals up to 45% of the activity that can be expected for an ideal monolayer of HRP molecules on all electrodes of the array. Localization of the immobilizate on the electrodes is accomplished by staining with the fluorescent product of the enzyme reaction. The high residual activity of enzymes after AC field induced immobilization shows the method's suitability for biosensing and research applications.
(20) Exploring Process-Voltage-Temperature Variations Impact on 4T1R Multiplexers for Energy-Aware Resistive RAM-based FPGAs
T. Rizzi, A. Baroni, A. Glukhov, D. Bertozzi, Ch. Wenger, D. Ielmini, C. Zambelli
Proc. IEEE International Integrated Reliability Workshop (IIRW 2022), (2022)
(MIMEC)
(21) AC Electrokinetic Immobilization of Influenza Virus
S. Stanke, Ch. Wenger, F.F. Bier, R. Hölzel
Electrophoresis 43(12), 1309 (2022)
DOI: 10.1002/elps.202100324, (BioBic)
The use of alternating current (AC) electrokinetic forces, like dielectrophoresis and AC electroosmosis, as a simple and fast method to immobilize sub-micrometer objects onto nanoelectrode arrays is presented. Due to its medical relevance, the influenza virus is chosen as a model organism. One of the outstanding features is that the immobilization of viral material to the electrodes can be achieved permanently, allowing subsequent handling independently from the electrical setup. Thus, by using merely electric fields, we demonstrate that the need of prior chemical surface modification could become obsolete. The accumulation of viral material over time is observed by fluorescence microscopy. The influences of side effects like electrothermal fluid flow, causing a fluid motion above the electrodes and causing an intensity gradient within the electrode array, are discussed. Due to the improved resolution by combining fluorescence microscopy with deconvolution, it is shown that the viral material is mainly drawn to the electrode edge and to a lesser extent to the electrode surface. Finally, areas of application for this functionalization technique are presented.
(22) Improved Graphene-Base Heterojunction Transistor with Different Collector Semiconductors for High-Frequency Applications
C. Strobel, C.A. Chavarin, S. Leszczynski, K. Richter, M. Knaut, J. Reif, S. Völkel, M. Albert, Ch. Wenger, J.W. Bartha, T. Mikolajick
Advanced Materials Letters 13(1), 011688 (2022)
DOI: 10.5185/amlett.2022.011688, (FFLEXCOM (D020))
(23) Ultrathin HfO2/Al2O3 Bilayer Based Reliable 1T1R RRAM Electronic Synapses with Low Power Consumption for Neuromorphic Computing
Q. Wang, Y. Wang, R. Luo, J. Wang, L. Ji, Z. Jiang, Ch. Wenger, Z. Song, S. Song, W. Ren, J. Bi, G. Niu
Neuromorphic Computing and Engineering 2(4), 044012 (2022)
DOI: 10.1088/2634-4386/aca179, (DFG-RRAM project)
Neuromorphic computing requires highly reliable and low power consumption electronic synapses. Complementary-metal-oxide-semiconductor (CMOS) compatible HfO2 based memristors are a strong candidate despite of challenges like non-optimized material engineering and device structures. We report here CMOS integrated 1-transistor-1-resistor (1T1R) electronic synapses with ultrathin HfO2/Al2O3 bilayer stacks (<5.5 nm) with high-performances. The layer thicknesses were optimized using statistically extensive electrical studies and the optimized HfO2(3 nm)/ Al2O3(1.5 nm) sample shows the high reliability of 600 DC cycles, the low Set voltage of ∼0.15 V and the low operation current of ∼6 µA. Electron transport mechanisms under cycling operation of single-layer HfO2 and bilayer HfO2/Al2O3 samples were compared, and it turned out that the inserted thin Al2O3 layer results in stable ionic conduction. Compared to the single layer HfO2 stack with almost the same thickness, the superiorities of HfO2/Al2O3 1T1R resistive random access memory (RRAM) devices in electronic synapse were thoroughly clarified, such as better DC analog switching and continuous conductance distribution in a larger regulated range (0–700 µS). Using the proposed bilayer HfO2/Al2O3 devices, a recognition accuracy of 95.6% of MNIST dataset was achieved. These results highlight the promising role of the ultrathin HfO2/Al2O3 bilayer RRAM devices in the application of high-performance neuromorphic computing.
A. Baroni, A. Glukhov, E. Perez, Ch. Wenger, E. Calore, S.F. Schifano, P. Olivo, D. Ielmini, C. Zambelli
Frontiers in Neuroscience 16, 932270 (2022)
DOI: 10.3389/fnins.2022.932270, (KI-IoT)
One of the objectives fostered in medical science is the so-called precision medicine, which requires the analysis of a large amount of survival data from patients to deeply understand treatment options. Tools like Machine Learning and Deep Neural Networks are becoming a de-facto standard. Nowadays, computing facilities based on the Von Neumann architecture are devoted to these tasks, yet rapidly hitting a bottleneck in performance and energy efficiency. The In-Memory Computing (IMC) architecture emerged as a revolutionary approach to overcome that issue. In this work, we propose an IMC architecture based on Resistive switching memory (RRAM) crossbar arrays to provide a convenient primitive for matrix–vector multiplication in a single computational step. This opens massive performance improvement in the acceleration of a neural network that is frequently used in survival analysis of biomedical records, namely the DeepSurv. We explored how the synaptic weights mapping strategy and the programming algorithms developed to counter RRAM non-idealities expose a performance/energy trade-off. Finally, we assessed the benefits of the proposed architectures with respect to a GPU-based realization of the same task, evidencing a tenfold improvement in terms of performance and three orders of magnitude with respect to energy efficiency.
(2) Low Conductance State Drift Characterization and Mitigation in Resistive Switching Memories (RRAM) for Artificial Neural Networks
A. Baroni, A. Glukhov, E. Perez, Ch. Wenger, D. Ielmini, P. Olivo, C. Zambelli
IEEE Transactions on Device and Materials Reliability 22(3), 340 (2022)
DOI: 10.1109/TDMR.2022.3182133, (KI-IoT)
The crossbar structure of Resistive-switching random access memory (RRAM) arrays enabled the In-Memory Computing circuits paradigm, since they imply the native acceleration of a crucial operations in this scenario, namely the Matrix-Vector-Multiplication (MVM). However, RRAM arrays are affected by several issues materializing in conductance variations that might cause severe performance degradation. A critical one is related to the drift of the low conductance states appearing immediately at the end of program and verify algorithms that are mandatory for an accurate multi-level conductance operation.
In this work, we analyze the benefits of a new programming algorithm that embodies Set and Reset switching operations to achieve better conductance control and lower variability. Data retention analysis performed with different temperatures for 168 hours evidence its superior performance with respect to standard programming approach. Finally, we explored the benefits of using our methodology at a higher abstraction level, through the simulation of an Artificial Neural Network for image recognition task (MNIST dataset). The accuracy achieved shows higher performance stability over temperature and time.
(3) Implementation of Device-to-Device and Cycle-to-Cycle Variability of Memristive Devices in Circuit Simulations
C. Bischoff, J. Leise, E. Perez-Bosch Quesada, E. Perez, Ch. Wenger, A. Kloes
Solid State Electronics 194, 108321 (2022)
DOI: 10.1016/j.sse.2022.108321, (KI-IoT)
We present a statistical procedure for the extraction of parameters of a compact model for memristive devices. Thereby, in a circuit simulation the typical fluctuations of the current-voltage (I-V) characteristics from device-to-device (D2D) and from cycle-to-cycle (C2C) can be emulated. The approach is based on the Stanford model whose parameters play a key role to integrating D2D and C2C dispersion. The influence of such variabilities over the model’s parameters is investigated by using a fitting algorithm fed with experimental data. After this, the statistical distributions of the parameters are used in a Monte Carlo simulation to reproduce the I-V D2D and C2C dispersions which show a good agreement to the measured curves. The results allow the simulation of the on/off current variation for the design of RRAM cells or memristor-based artificial neural networks.
(4) Analytical Calculation of Inference in Memristor-Based Stochastic Artificial Neural Networks
N. Bogun, E. Perez-Bosch Quesada, E. Perez, Ch. Wenger, A. Kloes, M. Schwarz
Proc. 29th International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2022), 83 (2022)
DOI: 10.23919/MIXDES55591.2022.9838321, (KI-IoT)
(5) Mitigating the Effects of RRAM Process Variation on the Accuracy of Artifical Neural Networks
M. Fritscher, J. Knödtel, M. Mallah, S. Pechmann, E. Perez-Bosch Quesada, T. Rizzi, Ch. Wenger, M. Reichenbach
Proc. 21st International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2021), in: Lecture Notes in Computer Science, Springer, LNCS 13227, 401 (2022)
DOI: 10.1007/978-3-031-04580-6_27, (Total Resilience)
In this work, three different RRAM compact models implemented in Verilog-A are analyzed and evaluated in order to reproduce the multilevel approach based on the switching capability of experimental devices. These models are integrated in 1T-1R cells to control their analog behavior by means of the compliance current imposed by the NMOS select transistor. Four different resistance levels are simulated and assessed with experimental verification to account for their multilevel capability. Further, an Artificial Neural Network study is carried out to evaluate in a real scenario the viability of the multilevel approach under study.
(6) Mitigating the Effects of RRAM Process Variation on the Accuracy of Artifical Neural Networks
M. Fritscher, J. Knödtel, M. Mallah, S. Pechmann, E. Perez-Bosch Quesada, T. Rizzi, Ch. Wenger, M. Reichenbach
Proc. 21st International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2021), in: Lecture Notes in Computer Science, Springer, LNCS 13227, 401 (2022)
DOI: 10.1007/978-3-031-04580-6_27, (KI-PRO)
In this work, three different RRAM compact models implemented in Verilog-A are analyzed and evaluated in order to reproduce the multilevel approach based on the switching capability of experimental devices. These models are integrated in 1T-1R cells to control their analog behavior by means of the compliance current imposed by the NMOS select transistor. Four different resistance levels are simulated and assessed with experimental verification to account for their multilevel capability. Further, an Artificial Neural Network study is carried out to evaluate in a real scenario the viability of the multilevel approach under study.
(7) Mitigating the Effects of RRAM Process Variation on the Accuracy of Artifical Neural Networks
M. Fritscher, J. Knödtel, M. Mallah, S. Pechmann, E. Perez-Bosch Quesada, T. Rizzi, Ch. Wenger, M. Reichenbach
Proc. 21st International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2021), in: Lecture Notes in Computer Science, Springer, LNCS 13227, 401 (2022)
DOI: 10.1007/978-3-031-04580-6_27, (NeuroMem)
In this work, three different RRAM compact models implemented in Verilog-A are analyzed and evaluated in order to reproduce the multilevel approach based on the switching capability of experimental devices. These models are integrated in 1T-1R cells to control their analog behavior by means of the compliance current imposed by the NMOS select transistor. Four different resistance levels are simulated and assessed with experimental verification to account for their multilevel capability. Further, an Artificial Neural Network study is carried out to evaluate in a real scenario the viability of the multilevel approach under study.
(8) End-to-End Modeling of Variability-Aware Neural Networks based on Resistive Switching Memory Arrays
A. Glukhov, N. Lepri, V. Milo, A. Baroni, C. Zambelli, P. Olivo, E. Perez, Ch. Wenger, D. Ielmini
Proc. 30th IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2022), (2022)
DOI: 10.1109/VLSI-SoC54400.2022.9939653, (KI-IoT)
(9) Statistical Model of Program/Verify Algorithms in Resistive Switching Memories for In-Memory Neural Network Accelerators
A. Glukhov, V. Milo, A. Baroni, N. Lepri, C. Zambelli, P. Olivo, E. Perez, Ch. Wenger, D. Ielmini
Proc. International Reliability Physics Symposium (IRPS 2022), 3C.3-1 (2022)
DOI: 10.1109/IRPS48227.2022.9764497, (Total Resilience)
(10) Statistical Model of Program/Verify Algorithms in Resistive Switching Memories for In-Memory Neural Network Accelerators
A. Glukhov, V. Milo, A. Baroni, N. Lepri, C. Zambelli, P. Olivo, E. Perez, Ch. Wenger, D. Ielmini
Proc. International Reliability Physics Symposium (IRPS 2022), 3C.3-1 (2022)
DOI: 10.1109/IRPS48227.2022.9764497, (KI-PRO)
(11) Statistical Model of Program/Verify Algorithms in Resistive Switching Memories for In-Memory Neural Network Accelerators
A. Glukhov, V. Milo, A. Baroni, N. Lepri, C. Zambelli, P. Olivo, E. Perez, Ch. Wenger, D. Ielmini
Proc. International Reliability Physics Symposium (IRPS 2022), 3C.3-1 (2022)
DOI: 10.1109/IRPS48227.2022.9764497, (NeuroMem)
(12) Precipitation of Suboxides in Silicon and its Impact on Gettering and Carrier Recombination
G. Kissinger, D. Kot, T. Müller, A. Sattler
Proc. 8th International Symposium on Advanced Science and Technology of Silicon Materials (JSPS Si Symposium 2022), 43 (2022)
(Future Silicon Wafers)
(13) In-Memory Principal Component Analysis by Crosspoint Array of Resistive Switching Memory: A New Hardware Approach for Energy-Efficient Data Analysis in Edge Computing
P. Mannocci, A. Baroni, E. Melacarne, C. Zambelli, P. Olivo, E. Perez, Ch. Wenger, D. Ielmini
IEEE Nanotechnology Magazine 16(2), 4 (2022)
DOI: 10.1109/MNANO.2022.3141515, (KI-IoT)
In-memory computing (IMC) is one of the most promising candidates for data-intensive computing accelerators of machine learning (ML). A key ML algorithm for dimensionality reduction and classification is the principal component analysis (PCA), which heavily relies on matrix-vector multiplications (MVM) for which classic von Neumann architectures are not optimized. Here, we provide the experimental demonstration of a new IMC-based PCA algorithm based on power iteration and deflation executed in a 4-kbit array of resistive switching randomaccess memory (RRAM). The classification accuracy of Wisconsin Breast Cancer dataset reaches 95.43%, close to floating-point implementation. Our simulations indicate a 250x improvement in energy efficiency compared to commercial graphic processing units (GPUs), thus supporting IMC for energy-efficient ML in modern data-intensive computing.
(14) In-Memory Principal Component Analysis by Crosspoint Array of Resistive Switching Memory: A New Hardware Approach for Energy-Efficient Data Analysis in Edge Computing
P. Mannocci, A. Baroni, E. Melacarne, C. Zambelli, P. Olivo, E. Perez, Ch. Wenger, D. Ielmini
IEEE Nanotechnology Magazine 16(2), 4 (2022)
DOI: 10.1109/MNANO.2022.3141515, (Neutronics)
In-memory computing (IMC) is one of the most promising candidates for data-intensive computing accelerators of machine learning (ML). A key ML algorithm for dimensionality reduction and classification is the principal component analysis (PCA), which heavily relies on matrix-vector multiplications (MVM) for which classic von Neumann architectures are not optimized. Here, we provide the experimental demonstration of a new IMC-based PCA algorithm based on power iteration and deflation executed in a 4-kbit array of resistive switching randomaccess memory (RRAM). The classification accuracy of Wisconsin Breast Cancer dataset reaches 95.43%, close to floating-point implementation. Our simulations indicate a 250x improvement in energy efficiency compared to commercial graphic processing units (GPUs), thus supporting IMC for energy-efficient ML in modern data-intensive computing.
(15) In-Memory Principal Component Analysis by Crosspoint Array of Resistive Switching Memory: A New Hardware Approach for Energy-Efficient Data Analysis in Edge Computing
P. Mannocci, A. Baroni, E. Melacarne, C. Zambelli, P. Olivo, E. Perez, Ch. Wenger, D. Ielmini
IEEE Nanotechnology Magazine 16(2), 4 (2022)
DOI: 10.1109/MNANO.2022.3141515, (Total Resilience)
In-memory computing (IMC) is one of the most promising candidates for data-intensive computing accelerators of machine learning (ML). A key ML algorithm for dimensionality reduction and classification is the principal component analysis (PCA), which heavily relies on matrix-vector multiplications (MVM) for which classic von Neumann architectures are not optimized. Here, we provide the experimental demonstration of a new IMC-based PCA algorithm based on power iteration and deflation executed in a 4-kbit array of resistive switching randomaccess memory (RRAM). The classification accuracy of Wisconsin Breast Cancer dataset reaches 95.43%, close to floating-point implementation. Our simulations indicate a 250x improvement in energy efficiency compared to commercial graphic processing units (GPUs), thus supporting IMC for energy-efficient ML in modern data-intensive computing.
(16) In-Depth Characterization of Switching Dynamics in Amorphous HfO2 Memristive Arrays for the Implementation of Synaptic Updating Rules
E. Perez, M.K. Mahadevaiah, E. Perez-Bosch Quesada, Ch. Wenger
Japanese Journal of Applied Physics 61(SM), SM1007 (2022)
DOI: 10.1109/TED.2021.3072868, (KI-IoT)
Accomplishing truly analog conductance modulation in memristive arrays is crucial in order to implement the synaptic plasticity in hardware-based neuromorphic systems. In this paper, such a feature was addressed by exploiting the inherent stochasticity of switching dynamics in amorphous HfO2 technology. A thorough statistical analysis of experimental characteristics measured in 4 kbit arrays by using trains of identical depression/ potentiation pulses with different voltage amplitudes and pulse widths provided the key to develop two different updating rules and to define their optimal programming parameters. The first rule is based on applying a specific number of identical pulses until the conductance value achieves the desired level. The second one utilized only one single pulse with a particular amplitude to achieve the targeted conductance level. In addition, all the results provided by the statistical analysis performed may play an important role in understanding better the switching behavior of this particular technology.
(17) In-Depth Characterization of Switching Dynamics in Amorphous HfO2 Memristive Arrays for the Implementation of Synaptic Updating Rules
E. Perez, M.K. Mahadevaiah, E. Perez-Bosch Quesada, Ch. Wenger
Japanese Journal of Applied Physics 61(SM), SM1007 (2022)
DOI: 10.1109/TED.2021.3072868, (Neutronics)
Accomplishing truly analog conductance modulation in memristive arrays is crucial in order to implement the synaptic plasticity in hardware-based neuromorphic systems. In this paper, such a feature was addressed by exploiting the inherent stochasticity of switching dynamics in amorphous HfO2 technology. A thorough statistical analysis of experimental characteristics measured in 4 kbit arrays by using trains of identical depression/ potentiation pulses with different voltage amplitudes and pulse widths provided the key to develop two different updating rules and to define their optimal programming parameters. The first rule is based on applying a specific number of identical pulses until the conductance value achieves the desired level. The second one utilized only one single pulse with a particular amplitude to achieve the targeted conductance level. In addition, all the results provided by the statistical analysis performed may play an important role in understanding better the switching behavior of this particular technology.
(18) In-Depth Characterization of Switching Dynamics in Amorphous HfO2 Memristive Arrays for the Implementation of Synaptic Updating Rules
E. Perez, M.K. Mahadevaiah, E. Perez-Bosch Quesada, Ch. Wenger
Japanese Journal of Applied Physics 61(SM), SM1007 (2022)
DOI: 10.1109/TED.2021.3072868, (NeuroMem)
Accomplishing truly analog conductance modulation in memristive arrays is crucial in order to implement the synaptic plasticity in hardware-based neuromorphic systems. In this paper, such a feature was addressed by exploiting the inherent stochasticity of switching dynamics in amorphous HfO2 technology. A thorough statistical analysis of experimental characteristics measured in 4 kbit arrays by using trains of identical depression/ potentiation pulses with different voltage amplitudes and pulse widths provided the key to develop two different updating rules and to define their optimal programming parameters. The first rule is based on applying a specific number of identical pulses until the conductance value achieves the desired level. The second one utilized only one single pulse with a particular amplitude to achieve the targeted conductance level. In addition, all the results provided by the statistical analysis performed may play an important role in understanding better the switching behavior of this particular technology.
(19) Activity of AC Electrokinetically Immobilized Horseradish Peroxidase
M. Prüfer, Ch. Wenger, F.F. Bier, E.-M. Laux, R. Hölzel
Electrophoresis 43(18-19), 1920 (2022)
DOI: 10.1002/elps.202200073, (exosurf)
Dielectrophoresis (DEP) is an AC electrokinetic effect mainly used to manipulate cells. Smaller particles, like virions, antibodies, enzymes and even dye molecules can be immobilized by DEP as well. In principle, it was shown that enzymes are active after immobilization by DEP, but no quantification of the retained activity was reported so far. In this study, the activity of the enzyme horseradish peroxidase (HRP) is quantified after immobilization by DEP. For this, HRP is immobilized on regular arrays of titanium nitride ring electrodes of 500 nm diameter and 20 nm widths. The activity of HRP on the electrode chip is measured with a limit of detection of 60 fg HRP by observing the enzymatic turnover of Amplex Red and H2O2 to fluorescent resorufin by fluorescence microscopy. The initial activity of the permanently immobilized HRP equals up to 45% of the activity that can be expected for an ideal monolayer of HRP molecules on all electrodes of the array. Localization of the immobilizate on the electrodes is accomplished by staining with the fluorescent product of the enzyme reaction. The high residual activity of enzymes after AC field induced immobilization shows the method's suitability for biosensing and research applications.
(20) Exploring Process-Voltage-Temperature Variations Impact on 4T1R Multiplexers for Energy-Aware Resistive RAM-based FPGAs
T. Rizzi, A. Baroni, A. Glukhov, D. Bertozzi, Ch. Wenger, D. Ielmini, C. Zambelli
Proc. IEEE International Integrated Reliability Workshop (IIRW 2022), (2022)
(MIMEC)
(21) AC Electrokinetic Immobilization of Influenza Virus
S. Stanke, Ch. Wenger, F.F. Bier, R. Hölzel
Electrophoresis 43(12), 1309 (2022)
DOI: 10.1002/elps.202100324, (BioBic)
The use of alternating current (AC) electrokinetic forces, like dielectrophoresis and AC electroosmosis, as a simple and fast method to immobilize sub-micrometer objects onto nanoelectrode arrays is presented. Due to its medical relevance, the influenza virus is chosen as a model organism. One of the outstanding features is that the immobilization of viral material to the electrodes can be achieved permanently, allowing subsequent handling independently from the electrical setup. Thus, by using merely electric fields, we demonstrate that the need of prior chemical surface modification could become obsolete. The accumulation of viral material over time is observed by fluorescence microscopy. The influences of side effects like electrothermal fluid flow, causing a fluid motion above the electrodes and causing an intensity gradient within the electrode array, are discussed. Due to the improved resolution by combining fluorescence microscopy with deconvolution, it is shown that the viral material is mainly drawn to the electrode edge and to a lesser extent to the electrode surface. Finally, areas of application for this functionalization technique are presented.
(22) Improved Graphene-Base Heterojunction Transistor with Different Collector Semiconductors for High-Frequency Applications
C. Strobel, C.A. Chavarin, S. Leszczynski, K. Richter, M. Knaut, J. Reif, S. Völkel, M. Albert, Ch. Wenger, J.W. Bartha, T. Mikolajick
Advanced Materials Letters 13(1), 011688 (2022)
DOI: 10.5185/amlett.2022.011688, (FFLEXCOM (D020))
(23) Ultrathin HfO2/Al2O3 Bilayer Based Reliable 1T1R RRAM Electronic Synapses with Low Power Consumption for Neuromorphic Computing
Q. Wang, Y. Wang, R. Luo, J. Wang, L. Ji, Z. Jiang, Ch. Wenger, Z. Song, S. Song, W. Ren, J. Bi, G. Niu
Neuromorphic Computing and Engineering 2(4), 044012 (2022)
DOI: 10.1088/2634-4386/aca179, (DFG-RRAM project)
Neuromorphic computing requires highly reliable and low power consumption electronic synapses. Complementary-metal-oxide-semiconductor (CMOS) compatible HfO2 based memristors are a strong candidate despite of challenges like non-optimized material engineering and device structures. We report here CMOS integrated 1-transistor-1-resistor (1T1R) electronic synapses with ultrathin HfO2/Al2O3 bilayer stacks (<5.5 nm) with high-performances. The layer thicknesses were optimized using statistically extensive electrical studies and the optimized HfO2(3 nm)/ Al2O3(1.5 nm) sample shows the high reliability of 600 DC cycles, the low Set voltage of ∼0.15 V and the low operation current of ∼6 µA. Electron transport mechanisms under cycling operation of single-layer HfO2 and bilayer HfO2/Al2O3 samples were compared, and it turned out that the inserted thin Al2O3 layer results in stable ionic conduction. Compared to the single layer HfO2 stack with almost the same thickness, the superiorities of HfO2/Al2O3 1T1R resistive random access memory (RRAM) devices in electronic synapse were thoroughly clarified, such as better DC analog switching and continuous conductance distribution in a larger regulated range (0–700 µS). Using the proposed bilayer HfO2/Al2O3 devices, a recognition accuracy of 95.6% of MNIST dataset was achieved. These results highlight the promising role of the ultrathin HfO2/Al2O3 bilayer RRAM devices in the application of high-performance neuromorphic computing.
