MPW and Prototyping Service

IHP gives researchers and development teams access to high-performance SiGe BiCMOS and silicon photonics technologies for advanced RF, mmWave, mixed-signal and photonic ICs. The broader Multi-Project Wafer (MPW) service uses 200 mm/8-inch silicon wafers.

Through our MPW and prototyping services, you can validate new chip designs using established 0.13 µm and 0.25 µm technology platforms, including HBT performance up to 650 GHz f_max without the cost of a dedicated wafer run. 

The standard 0.13 and 0.25 μm CMOS processes provide NMOS, PMOS, isolated NMOS and passive components such as poly resistors and MIM capacitors. In addition to the standard processes, we cover various front-end-of-line options, including an enhanced BEOL option with copper.

For a complete overview of technologies and shipping dates, please check the MPW Schedule and Price Information.

Design and fabrication 

Design kits for Cadence and Keysight ADS support the development process from circuit design through prototyping and towards low-volume production. 

We provide

• a Cadence-based mixed-signal Design Kit;
• a Keysight ADS analog Design Kit for high-frequency design;
• reusable wireless and broadband IP/blocks;
• PDK support for specialized modules. 

Customers can extend the base processes with the following specialized modules:

• LBE (Localized Backside Etching): removes silicon locally to improve passive properties; available in all Al-BEOL technologies.
• H7PIC: The technology contains Silicon Photonics plus SG25 Backend of Line.
• MEMRES: fully CMOS integrated memristive/RRAM functionality based on resistive TiN / HfO_2-x / TiN switching devices in SG13G2 technology; PDK support including layout and VerilogA simulation model available.
• TSV: for SG13S and SG13G2 – provides low-inductance RF grounding and improved chip-to-package connectivity:
  • Through-Silicon Via Module for RF Grounding available for SG13 technologies.
  • Single TSVs can provide low GND inductance ≈ 30 pH to improve RF circuit performance.
  • Backside metallization can also be used for improved chip-to-package contacting.

For more details on the PDKs offered and the software supported, refer to the design kit page. (Link)

Core SiGe BiCMOS and Silicon Photonics Technologies

0.13 μm CMOS Al-Backend: five thin and two thick Top Metal (TM) layers: TM1 – 2 μm, TM2 – 3 μm. 

The SG13G3Cu technology offers IHP´s highest performance HBT’s with up to 500 GHz transit frequencies and up to 650 GHz maximum oscillation frequencies. The process offers an 8-layer Cu-BEOL from X-FAB containing thin Cu layers, 2 thick Cu layers, a thin Al layer with 2 fF/μm MIM capacitor and a thick Aluminum top layer. This technology offers CMOS devices with 130 nm gate length and 1.2 V core voltage and high voltage CMOS devices with 3.3 V core voltage.