Technologies for Smart Systems

Technologies for smart systems are an important foundation for IHP’s strategic research areas: technologies for Wireless & Broadband Communication, Sensors, Health & Environment, and technologies for Resilient Systems. To support these areas, the Technology department develops silicon- and germanium-based devices, modules, and technology platforms for communications, RF electronics, sensors, artificial intelligence, and quantum technologies.

The focus is on the functional enhancement of CMOS technologies. To this end, the department develops and optimizes high-performance SiGe BiCMOS and photonics technologies based on IHP’s 200 mm silicon platform.

For more than 20 years, this technological expertise has provided the foundation for the department’s continuous development. Around half of IHP’s employees work in the department, including the staff who operate the cleanroom in continuous shifts.

A particular strength is the close integration of research, manufacturing, and services. New technologies are stabilized, quickly transferred to the IHP pilot line as technology platforms, and made available to partners through IHP’s research services for research and prototype manufacturing. The portfolio includes the Multi-Project Wafer (MPW) program as well as module and individual process-step development for 200 mm processes.

As part of Research Fab Microelectronics Germany, the department works with research partners on new process capabilities and technology developments. This expands both the research infrastructure and the available technology portfolio.

Capabilities

Development of SiGe BiCMOS and Photonics Technologies

The department develops and expands high-performance SiGe BiCMOS and photonics technologies based on IHP’s 200 mm silicon platform. This work includes new devices, process modules, and technology platforms that are compatible with silicon-based manufacturing, as well as modular extensions of standard CMOS technologies.

Technology Optimization and Qualification

Existing IHP technologies are transferred, optimized, stabilized, and further developed to improve their performance. This work includes process qualification, reliability assessment, and the transfer of research results into stable processes for the cleanroom, which operates in a 24/7 mode.

THz and RF Technologies

Research includes SiGe-based THz devices and new integration concepts for RF systems. These technologies support applications in wireless and broadband communications using silicon-based electrical and optoelectronic RF components.

Silicon Photonics and Optoelectronics

Activities in this area include the development of silicon-germanium photonics modules, including germanium photodetectors and modulators, and their integration into BiCMOS technologies. Research also focuses on complex silicon photonics platforms and photonic sensors for health and environmental analysis.

Novel Materials and Devices

New materials and devices are integrated into silicon-based technologies. These include memristive cells for artificial intelligence applications as well as devices for radiation-resistant systems.

Monolithic and Heterogeneous Integration

Advanced and multi-technology integration concepts are the objective of this research which includes approaches to (quasi)-monolithic and heterogeneous integration in which electronics and additional module functions are combined on a single chip or within an integrated system. The methods used include wafer bonding and chip transfer for the heterogeneous integration of chiplets.

Process and Device Characterization

Capabilities include electrical and optoelectronic measurements, RF testing, materials analysis, process diagnostics, device modeling, functional testing, and reliability assessments.

Services

IHP has all the capabilities required to develop and manufacture state-of-the-art SiGe BiCMOS technologies. The department offers research, module, MPW, and prototyping services to scientific and industrial partners worldwide. These include:

  • Access to 0.13 µm technologies through MPW and prototyping programs
  • Research and prototype manufacturing using newly developed technologies
  • Development of process modules and individual process steps for 200 mm technologies
  • Integration of SiGe and photonics modules into CMOS technologies
  • Modular extension of standard CMOS technologies
  • Integration of new materials into silicon-based processes
  • Electrical, optoelectronic, and RF characterization
  • Diagnostic analyses, reliability testing, and process qualification
  • Design kit support for internal and external projects
  • Transfer of technologies and technology modules to and from industrial partners
  • Stabilization and transfer of research technologies into IHP’s research and manufacturing services

Prof. Dr. Andreas Mai

Secretary:
Katja Albani
Phone: +49 335 5625 670
Fax: +49 335 5625 327
Send e-mail »

Research Groups

 

 

Technical Basis

24/7 R&D Pilot Line

At the heart of IHP is its state-of-the-art pilot line, located in a 1,500 m² cleanroom that operates 24 hours a day, 7 days a week. An additional 300 m² of cleanroom space is available for wafer bonding and the heterogeneous integration of chiplets.

The toolset supports 0.13 µm technology on 200 mm wafers. Cycle times are typically three days per lithography mask. The processing time from tape-in to shipment of the diced chips is approximately 16 weeks, depending on the technology used.

Key equipment for wafer fabrication within the pilot line includes:

  • DUV photolithography (248 nm laser exposure) & I-line
  • CMP in the FEOL (oxide, poly-Si) and BEOL (oxide, tungsten)
  • Dry etching processes for standard CMOS and BiCMOS process modules
  • PVD (Co, Al, Ti, TiN, Ni) and CVD (W, TiN) for the Al metallization system
  • Atomic layer deposition (ALD) for HfO2, Al2O, SiO2, and SiN
  • PECVD (including HDP) and SACVD for dielectric deposition in the FEOL and BEOL
  • Wet etching and wet cleaning processes required for a 0.13 µm technology node
  • Low-temperature Si, SiGe, and SiGe:C epitaxy (differential and selective epitaxy)
  • Low- to medium-energy and low- to high-dose ion implantation (As, B, P, In, Sb, Si, Ge, F, Ar)
  • Oxidation, LPCVD (including low-temperature oxide and nitride), and annealing in standard batch systems
  • RTP for annealing, oxidation, and silicidation
  • 8-inch high-vacuum wafer bonding system
  • 8-inch transfer-printing toolset
  • Inline measurements for CD, overlay, layer thickness, resistance, defectivity, topology (SEM, AFM), and XRD
  • Parametric testing using two fully automated test systems 

Electrical characterization and material analysis

The following key methods are employed for offline diagnostics and analytics, electrical measurements, and reliability tests:

  • SIMS, TEM, SEM, AES, XRD, XRR, XPS, AFM, and FTIR
  • DC parameter setup for measurements on wafers and packaged devices
  • LF noise setup for 1/f noise measurements on wafers
  • Ring oscillator setup for measurements on wafers and packaged devices
  • S-parameter/DC/RF noise measurement system for on-wafer measurements
  • S-parameter/DC equipment for parameter extraction and device modeling
  • Digital tester for digital/mixed-signal functional testing
  • MOS CV/IV equipment for DC/CV characterization
  • Test systems for intrinsic reliability testing for technology qualification

News

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