HYB-RISC

Goal of the intended project are both fundamental technological investigations on technological and Computer architectural side for the realization of a low-power edge or loT (internet-of-things) non-volatile processor (NVP). The low-power features of this new processor are based on exploiting synergies of a hybrid memory consisting of a non-volatile resistive random-access-memory (RRAM) and a volatile static RAM (SRAM). The original idea of an NVP was to be immune against power supply failures. However, we want to set an additional focus on power.

Funding

The project is funded by the German Research Foundation (DFG).

Project Partners

University of Erlangen–Nuremberg

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