Publications 2025
Script list Publications
(1) When to Use Rectangular Waveforms in Dielectrophoresis Application to Increase Separation and Sorting Efficiency
N. Boldt, L. Weirauch, J.M. Späth, U. Kerst, M. Birkholz, M. Baune, R. Thewes
Electrophoresis 46(1-2), 104 (2025)
DOI: 10.1002/elps.202400164, (Bioelectronics)
In this study, the influence of using rectangular waveforms is comprehensively investigated on the separation and sorting efficiency of dielectrophoretic (DEP) processes. Besides positive effects on DEP experiments cases for a diminished force due to rectangular waveforms are investigated and discussed. This investigation encompasses two primary experimental setups. Firstly, microparticle focusing experiments are carried out using a pair of electrodes within a microfluidic channel. Secondly, separation experiments are performed using a macroscopic insulator-based dielectrophoretic filter. The study reveals that harmonics of rectangular signals can have a positive impact on separation or sorting efficiency when compared to sinusoidal waveforms, provided that these harmonics contribute to the overall DEP force with the same sign. This positive effect is found to depend on the ratio between applied fundamental frequency and the cross-over frequency in the Clausius-Mossotti factor. However, violating related derived boundary conditions leads to negative effects and a decrease of the DEP net force.
(2) Impact of Biased Cooling on the Operation of Undoped Silicon Quantum Well Field-Effect Devices for Quantum Circuit Applications
L.K. Diebel, L.G. Zinkl, A. Hötzinger, F. Reichmann, M. Lisker, Y. Yamamoto, D. Bougeard
AIP Advances 15(3), 035301 (2025)
DOI: 10.1063/5.0250968, (QUASAR)
Gate-tunable semiconductor nanosystems are getting more and more important in the realization of quantum circuits. While such devices are typically cooled to operation temperature with zero bias applied to the gate, biased cooling corresponds to a non-zero gate voltage being applied before reaching the operation temperature. We systematically study the effect of biased cooling on different undoped SiGe/Si/SiGe quantum well field-effect stacks designed to accumulate and density-tune two-dimensional electron gases (2DEGs). In an empirical model, we show that biased cooling of the undoped FES induces a static electric field, which is constant at operation temperature and superimposes onto the field exerted by the top gate onto the 2DEG. We show that the voltage operation window of the field-effect-tuned 2DEG can be chosen in a wide range of voltages via the choice of the biased cooling voltage. Importantly, quality features of the 2DEG such as the mobility or the temporal stability of the 2DEG density remain unaltered under biased cooling.
(3) Varactors for Integrated RF Circuits in a 130 nm BiCMOS Technology
M. Elviretti, A. Malignaggi, N. Pelagalli, H. Rücker, L. Menicucci Salamanca, Ch. Wipf, C. Carta, A. Mai
Proc. 16th German Microwave Conference (GeMiC 2025), 368 (2025)
DOI: 10.23919/GeMiC64734.2025.10979116, (SICHER)
(4) Investigating Impacts of Local Pressure and Temperature on CVD Growth of Hexagonal Boron Nitride on Ge(001)/Si
M. Franck, J. Dabrowski, M.A. Schubert. D. Vignaud, M. Achehboune, J.-F. Colomer, L. Henrard, Ch. Wenger, M. Lukosius
Advanced Materials Interfaces 12(1), 2400467 (2025)
DOI: 10.1002/admi.202400467, (2DHetero)
The chemical vapor deposition (CVD) growth of hexagonal boron nitride (hBN) on Ge substrates is a promising pathway to high-quality hBN thin films without metal contaminations for microelectronic applications, but the effect of CVD process parameters on the hBN properties is not well understood yet. The influence of local changes in pressure and temperature due to different reactor configurations on the structure and quality of hBN films grown on Ge(001)/Si is studied. Injection of the borazine precursor close to the sample surface results in an inhomogeneous film thickness, attributed to an inhomogeneous pressure distribution at the surface, as shown by computational fluid dynamics simulations. The additional formation of nanocrystalline islands is attributed to unfavorable gas phase reactions due to the radiative heating of the injector. Both issues are mitigated by increasing the injector-sample distance, leading to an 86% reduction in pressure variability on the sample surface and a 200 °C reduction in precursor temperature. The resulting hBN films exhibit no nanocrystalline islands, improved thickness homogeneity, and high crystalline quality (Raman FWHM = 23 cm−1). This is competitive with hBN films grown on other non-metal substrates but achieved at lower temperature and with a low thickness of only a few nanometers.
(5) A High-Gain 240-325-GHz Power Amplifier for IEEE 802.15.3d Applications in an Advanced BiCMOS Technology
A. Gadallah, A. Malignaggi, B. Sütbas, H. Rücker, D. Kissinger, M.H. Eissa
Proc. 25th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2025), 19 (2025)
(Open 6G Hub)
(6) Strategies to Realize AC Electrokinetic Enhanced Mass-Transfer in Silicon based Photonic Biosensors
A. Henriksson, P. Neubauer, M. Birkholz
Advanced Materials Technologies 10(2), 2302191 (2024)
DOI: 10.1002/admt.202302191, (Bioelectronics)
Silicon-on-insulator (SOI) based photonic sensors, particularly those utilizing Photonic Integrated Circuit (PIC) technology, have emerged as promising candidates for miniaturized bioanalytical devices. These sensors offer real-time responses, occupy minimal space, possess high sensitivity, and facilitate label-free detection. However, like many biosensors, they face challenges when detecting analytes at exceedingly low concentrations due to limitations in mass transport. An intriguing method to enhance mass transfer in microfluidic biosensors is AC electrokinetics. Proof-of-concept experiments have demonstrated significant enhancements in limit of detection (LOD) and response times. AC electrokinetics, compatible with silicon photonic sensors, offers techniques such as electroosmosis, electrothermal effects, and dielectrophoresis to modify fluid flow and manipulate particle trajections. This article delves into various approaches for integrating AC electrokinetics into silicon photonic biosensors, shedding light on both its advantages and limitations.
(7) A High-Speed Linear Modulator Driver for 200-GBd PAM-4 with Low Group Delay Variation in 130-nm SiGe BiCMOS
R. Huber, L. Zimmermann, D. Kissinger
Proc. 16th German Microwave Conference (GeMiC 2025), 132 (2025)
DOI: 10.23919/GeMiC64734.2025.10979042, (DFG EPIC-Sense 2)
(8) Industrially Fabricated Single-Electron Quantum Dots in Si/Si–Ge Heterostructures
T. Huckemann, P. Muster, W. Langheinrich, V. Brackmann, M. Friedrich, N.D. Komericki, L.K. Diebel, V. Stieß, D. Bougeard, Y. Yamamoto, F. Reichmann, M.H. Zoellner, C. Dahl, L.R. Schreiber, H. Bluhm
IEEE Electron Device Letters 46(5), 868 (2025)
DOI: 10.1109/LED.2025.3553672, (IHP - RWTH Aachen / FZ Jülich Joint Lab)
This paper reports the compatibility of heterostructure-based spin qubit devices with industrial CMOS technology. It features Si/Si–Ge quantum dot devices fabricated using Infineon’s 200mm production line within a restricted thermal budget. The devices exhibit state-of-the-art charge sensing, charge noise and valley splitting characteristics, showing that industrial fabrication is not harming the heterostructure quality. These measured parameters are all correlated to spin qubit coherence and qubit gate fidelity. We describe the single electron device layout, design and its fabrication process using electron beam lithography. The incorporated standard 90nm back-end of line flow for gate-layer independent contacting and wiring can be scaled up to multiple wiring layers for scalable quantum computing architectures. In addition, we present millikelvin characterization results. Our work exemplifies the potential of industrial fabrication methods to harness the inherent CMOS-compatibility of the Si/Si–Ge material system, despite being restricted to a reduced thermal budget. It paves the way for advanced quantum processor architectures with high yield and device quality.
(9) 44 GHz Bandwidth Optical Receiver Monolithically Integrated in a SiGe ePIC BiCMOS Technology
F. Iseini, N. Pelagalli, A. Malignaggi, A. Peczek, C. Carta, G. Kahmen
20th IEEE Radio & Wireless Week (RWW 2025), 12 (2025)
(100G)
(10) Broadband and Compact 112 Gbit/s Transimpedance Amplifier in a SiGe Copper Backend Technology
F. Iseini, A. Malignaggi, F. Korndörfer, C. Carta, G. Kahmen
Proc. 16th German Microwave Conference (GeMiC 2025), 601 (2025)
DOI: 10.23919/GeMiC64734.2025.10979095, (100G)
(11) High-Sensitive Broadband Terahertz Detectors for Hyperspectral Imaging
V. Jagtap, U. Kalita, R. Jain, H. Rücker, B. Heinemann, U.R. Pfeiffer
Imaging Sensors, Power Management, PLLs and Frequency Synthesizers, 1st Edition, Editors: K.A.A. Makinwa, A. Baschirotto, B. Nauta, Chapter. High-Sensitive Broadband Terahertz Detectors for Hyperspectral Imaging, Springer, 99 (2025)
DOI: 10.1007/978-3-031-71559-4
(12) Enhancing Device Performance with High Electron Mobility GeSn Materials
Y. Junk, O. Concepción, M. Frauenrath, J. Sun, J.H. Bae, F. Bärwolf, A. Mai, J.-M. Hartmann, D. Grützmacher, D. Buca, Q.-T. Zhao
Advanced Electronic Materials 11(5), 2400561 (2024)
DOI: 10.1002/aelm.202400561
As transistors continue to shrink, the need to replace silicon with materials of higher carrier mobilities becomes imperative. Group-IV semiconductors, and particularly GeSn alloys, stand out for their high electron and hole mobilities, making them attractive for next-generation electronics. While Ge p-channel devices already possess a high hole mobility, here the focus is on enhancing n-channel transistor performance by utilizing the superior electron mobility of GeSn as channel material. Vertical gate-all-around nanowire (GAA NW) transistors are fabricated using epitaxial GeSn heterostructures that leverage the material growth, in situ doping, and band engineering across source/channel/drain regions. It is demonstrated that increasing Sn content in GeSn alloys constantly improves the device performances, reaching a fivefold on-current improvement over standard Ge devices for 11 at.% Sn content. The present results underline the real potential of the GeSn alloys to bring performance and energy efficiency to future nanoelectronics applications.
(13) Electronic-Photonic Integrated Circuits Through Micro-Transfer Printing
H. Liu, T. Pannier, Y. Gu, R. Loi, P. Ramaswamy, P. Steglich, B. Pan, J. Zhang, P. Ossieur, G. Roelkens
Proc. IEEE Silicon Photonics Conference (SiPhotonics 2025), WB3 (2025)
DOI: 10.1109/SiPhotonics64386.2025.10984590, (CALADAN)
(14) Processing and Characterization of High-Density Fe-Silicide/Si Core–Shell Quantum Dots for Light Emission
K. Makihara, Y. Yamamoto, M.A. Schubert, A. Mai, S. Miyazaki
Nanomaterials (MDPI) 15(10), 733 (2025)
DOI: 10.3390/nano15100733
Si-based photonics has garnered considerable attention as a future device for complementary metal–oxide–semiconductor (CMOS) computing. However, few studies have investigated Si-based light sources highly compatible with Si ultra large-scale integration processing. In this study, we observed stable light emission at room temperature from superatom-like β–FeSi2–core/Si–shell quantum dots (QDs). The β–FeSi2–core/Si–shell QDs, with an areal density as high as ~1011 cm−2 were fabricated by self-aligned silicide process of Fe–silicide capped Si–QDs on ~3.0 nm SiO2/n–Si (100) substrates, followed by SiH4 exposure at 400 °C. From the room temperature photoluminescence characteristics, β–FeSi2 core/Si–shell QDs can be regarded as active elements in optical applications because they offer the advantages of photonic signal processing capabilities and can be combined with electronic logic control and data storage.
(15) A Comprehensive Statistical Study of the Post-Programming Conductance Drift in HfO2-based Memristive Devices
D. Maldonado, C. Acal, H. Ortiz, A.M. Aguilera, J.E. Ruiz-Castro, A. Cantudo, A. Baroni, K.D.S. Reddy, S. Pechmann, M. Uhlmann, Ch. Wenger, E. Perez, J.B. Roldan
Materials Science in Semiconductor Processing 196, 109668 (2025)
DOI: 10.1016/j.mssp.2025.109668, (KI-IoT)
(16) In Situ X-Ray Photoelectron Spectroscopy Study of Atomic Layer Deposited Cerium Oxide on SiO2: Substrate Influence on the Reaction Mechanism During the Early Stages of Growth
C. Morales, M. Gertig, M. Kot, C.A. Chavarin, M.A. Schubert, M.H. Zoellner, Ch. Wenger, K. Henkel, J.I. Flege
Advanced Materials Interfaces 12(5), 2400537 (2024)
DOI: 10.1002/admi.202400537, (iCampus II)
Thermal atomic layer deposition (ALD) of cerium oxide using commercial Ce(thd)4 precursor and O3 on SiO2 substrates is studied employing in-situ X-ray photoelectron spectroscopy (XPS). The system presents a complex growth behavior determined by the change in the reaction mechanism when the precursor interacts with the substrate or the cerium oxide surface. During the first growth stage, non-ALD side reactions promoted by the substrate affect the growth per cycle, the amount of carbon residue on the surface, and the oxidation degree of cerium oxide. On the contrary, the second growth stage is characterized by a constant growth per cycle in good agreement with the literature, low carbon residues, and almost fully oxidized cerium oxide films. This distinction between two growth regimes is not unique to the CeOx/SiO2 system but can be generalized to other metal oxide substrates. Furthermore, the film growth deviates from the ideal layer-by-layer mode, forming micrometric inhomogeneous and defective flakes that eventually coalesce for deposit thicknesses above 10 nm. The ALD-cerium oxide films present less order and a higher density of defects than films grown by physical vapor deposition techniques, likely affecting their reactivity in oxidizing and reducing conditions.
(17) Evaluation of Lateral Selective Etching with CF4/H2 Plasma of Si0.7Ge0.3/Si/Si0.7Ge0.3 Layers
K. Ozaki, N. Takada, Y. Imai, T. Tsutsumi, K. Ishikawa, Y. Yamamoto, W.-C. Wen, K. Makihara
Proc. 17th International Symposium on Advanced Plasma Science and its Applications for Nitrides and Nanomaterials/18th International Conference on Plasma-Nano Technology & Science (ISPlasma 2025/IC-Plants 2025), abstr. book 04pA06O (2025)
(18) Testbeam Characterization of a SiGe BiCMOS Monolithic Silicon Pixel Detector with Internal Gain Layer
L. Paolozzi, M. Milanesio, T. Moretti, R. Cardella, T. Kugathasan, A. Picardi, M. Elviretti, H. Rücker, F. Cadoux, R. Cardarelli, L. Cecconi, S. Débieux, Y. Favre, C.A. Fenoglio, D. Ferrere, S. Gonzalez-Sevilla, L. Iodice, R. Kotitsa, C. Magliocca, M. Nessi, A. Pizarro-Medina, J. Saidi, M. Vicente Barreto Pinto, S. Zambito, G. Iacobucci
Journal of Instrumentation 20, P04001 (2025)
DOI: 10.1088/1748-0221/20/04/P04001
A monolithic silicon pixel ASIC prototype, produced in 2024 as part of the Horizon 2020 MONOLITH ERC Advanced project, was tested with a 120 GeV/c pion beam. The ASIC features a matrix of hexagonal pixels with a 100 𝜇m pitch, read by low-noise, high-speed front-end electronics built using 130 nm SiGe BiCMOS technology. It includes the PicoAD sensor, which employs a continuous, deep PN junction to generate avalanche gain. Data were taken across power densities from 0.05 to 2.6 W/cm2 and sensor bias voltages from 90 to 180 V. At the highest bias voltage, corresponding to an electron gain of 50, and maximum power density, an efficiency of (99.99 ± 0.01)% was achieved. The time resolution at this working point was (24.3 ± 0.2) ps before time-walk correction, improving to (12.1 ± 0.3) ps after correction.
(19) Wafer-Scale Experimental Determination of Coupling and Loss for Photonic Integrated Circuit Design Optimisation
D. Schmid, R. Eisermann, A. Peczek, G. Winzer, L. Zimmermann, S. Krenek
Photonics 12(3), 234 (2025)
DOI: 10.3390/photonics12030234, (PhoQuS-T (23FUN01))
We investigate integrated silicon ring resonators with regard to the influence of design parameters and intra-wafer variations. First, we show the effect of different ring radii and gaps between ring and bus waveguide on optical properties (peak width, finesse, Qfactor, and extinction ratio), from which we calculate the resonators’ coupling and loss coefficients. The dependence on the gap of these properties is discussed at the wafer scale. Second, by incorporating the spectra of 2242 resonators from 59 nominally identical dies on a 200mm wafer, we show how these properties depend on the resonators’ position on the wafer. Third, we demonstrate how curve fitting of loss and coupling coefficients as a function of the gaps can be used to estimate the optimal gap that realizes critical coupling with a significantly reduced number of manufactured test structures needed to find optimal design parameters.
(20) Growth of Boron-Doped Germanium Single Crystals by the Czochralski Method
A.N. Subramanian, M.P. Kabukcuoglu, C. Richter, U. Juda, R. Kernke, F. Bärwolf, E. Hamann, M. Zuber, N.V. Abrosimov, R.R. Sumathi
Crystal Growth & Design 25(4), 1075 (2025)
DOI: 10.1021/acs.cgd.4c01413
In this paper, we present the growth of boron-doped germanium single crystals using the Czochralski method. Boron was introduced into the solid phase prior to the initiation of the growth experiment. Enhanced dissolution of boron in the germanium melt was observed at higher temperatures, facilitating the single crystalline growth. The distribution of boron along the crystal length was quantified at several positions using secondary ion mass spectrometry, with concentrations reaching up to 1018 atoms/cm3 near the seed (top region) of the grown crystals. These results are compared with the theoretically predicted boron segregation profile calculated using the Scheil–Pfann equation. Additionally, the structural quality of the crystals was examined by using etch pit density measurement and X-ray diffraction techniques, including synchrotron white-beam X-ray topography and X-ray rocking curve imaging. It is shown that variations in boron concentrations in the 0–0.5 solidified fractions (g) of the grown crystals lead to a strain field along the growth direction. Finally, the feasibility and challenges of growing heavily boron-doped germanium crystals from the melt while maintaining a single crystallinity with a low dislocation density are discussed.
(21) A Fully Integrated 0.48 THz FMCW Radar Sensor in a SiGe Technology
F. Vogelsang, J. Bott, D. Starke, M. Hamme, B. Sievert, H. Rücker, N. Pohl
IEEE Journal of Microwaves 5(3), 572 (2025)
DOI: 10.1109/JMW.2025.3553681
The THz gap has been a significant research objective for photonics and electronics for decades. This work introduces a fully integrated frequency modulated continuous wave (FMCW) radar sensor with a center frequency of 0.48 THz, realized in a silicon-germanium (SiGe) technology. The sensor consists of a THz MMIC integrated onto a front-end printed circuit board (PCB) with FR4 substrate used for frequency synthesis and IF signal amplification. A dielectric polytetrafluoroethylene (PTFE) lens is mounted above the MMIC to act as transmitter (Tx) and receiver (Rx) lens as well as a physical protection for the bond wires of the MMIC. A back-end PCB generates the supply voltages and control signals, and its analog-digital-converter (ADC) samples the IF signal. The whole sensor is just 4.9 cm by 4.3 cm in size and is cost-efficient due to its design with FR4 PCBs. The MMIC reaches an output power of up to −9 dBm. In FMCW operation with the full sensor, a tuning range of 49 GHz is reached along an equivalent isotropic radiated power (EIRP) of up to 22 dBm. Distance measurements were successfully tested for distances of up to 5 m, and a radiation pattern is presented. In summary, this article demonstrates the potential of SiGe technology in the THz range for applications like localization, material characterization, and communication.
(22) Three-Dimensional Self-Ordering and Alignment Control of Ge Nanodots Fabricated by Chemical Vapor Deposition
W.-C. Wen, B. Tillack, Y. Yamamoto
Proc. 17th International Symposium on Advanced Plasma Science and its Applications for Nitrides and Nanomaterials/18th International Conference on Plasma-Nano Technology & Science (ISPlasma2025/IC-PLANTS 2025), abstr. book 05pB09I (2025)
(23) SiGe BiCMOS Wafer-Level Packaging and Antenna Integration for Sub-THz Applications
M. Wietstruck, S. Schulze, P. Krüger, T. Voß, M.F. Bashir, S. Tolunay Wipf, E.C. Durmaz, K. Joy
Proc. 16th German Microwave Conference (GeMiC 2025), 354 (2025)
DOI: 10.23919/GeMiC64734.2025.10979099, (iCampus II)
(24) Piezoresistivity of Epitaxial SiGe
Y. Yamamoto, W.-C. Wen, N. Inomata, A.A. Corley-Wiciak, D. Ryzhak, C. Corley-Wiciak, Z. Zhijian, R. Sorge, B. Tillack, T. Ono
ECS Journal of Solid State Science and Technology 14(4), 045001 (2025)
DOI: 10.1149/2162-8777/adc488
Piezoresistivity of B- and P-doped epitaxial Si1-xGex (x=10-30%) is investigated to assess its application potential for thin film strain sensors. The gauge factor (GF) is calculated based on the change in resistivity to the externally induced compressive uniaxial strain along the current flow direction. In the case of B-doped SiGe, the resistivity decreases under the induced compressive strain which may be related to hole mobility enhancement, while no influence on the resistivity of the P-doped SiGe. A significant increase in the GF is observed by lowering B concentration. At the same B concentration, slightly higher GF is observed for higher Ge content. Moreover, the GF is slightly improved by lowering the SiGe growth temperature, which may be related to improved crystallinity indicated by capacitance-voltage characteristics of metal-oxide-semiconductor structure using the epitaxial SiGe on Si. These results suggest that the low-doped p-type SiGe deposited at low temperature has reasonable GF and can potentially be applied in strain sensors.
(25) Fully Automated Wafer-Level Edge Coupling Measurement System for Silicon Photonics Integrated Circuits
Q. Yuan, A. Peczek, J. Frankel, D. Rishavy, Ch. Mai, E. Christenson, D. Pratap, L. Zimmermann
IEEE Transactions on Semiconductor Manufacturing 38(2), 168 (2025)
DOI: 10.1109/TSM.2025.3552349, (QISSME)
In this work, we introduce a novel, fully automated wafer-level edge coupling measurement system designed specifically for silicon photonic integrated circuits (PICs). This system integrates state-of-the-art technologies, including optical probes, advanced alignment algorithms, and precision calibration processes, to ensure high coupling efficiency, rapid throughput, and exceptional repeatability. The optical probe, known as the Pharos lens, incorporates a periscope structure to facilitate effective vertical-to-horizontal light conversion, providing ultra-high coupling efficiency. The system also leverages adaptive optics algorithms to enhance measurement accuracy, compensating for optical aberrations and other distortions. Through extensive testing on 200 mm silicon wafers fabricated with 0.25 lm photonic BiCMOS technology, we demonstrate that our system achieves consistent coupling efficiency with less than 0.2 dB of repeatability and remarkable stability, with fluctuations within 0.01 dB during 10-minute testing intervals. Our results underline the systems ability to address the critical challenges in modern photonic testing and highlight its potential for improving manufacturing processes in the semiconductor and photonic industries.
(26) Fully Automated Wafer-Level Edge Coupling Measurement System for Silicon Photonics Integrated Circuits
Q. Yuan, A. Peczek, J. Frankel, D. Rishavy, Ch. Mai, E. Christenson, D. Pratap, L. Zimmermann
IEEE Transactions on Semiconductor Manufacturing 38(2), 168 (2025)
DOI: 10.1109/TSM.2025.3552349, (PEARLS)
In this work, we introduce a novel, fully automated wafer-level edge coupling measurement system designed specifically for silicon photonic integrated circuits (PICs). This system integrates state-of-the-art technologies, including optical probes, advanced alignment algorithms, and precision calibration processes, to ensure high coupling efficiency, rapid throughput, and exceptional repeatability. The optical probe, known as the Pharos lens, incorporates a periscope structure to facilitate effective vertical-to-horizontal light conversion, providing ultra-high coupling efficiency. The system also leverages adaptive optics algorithms to enhance measurement accuracy, compensating for optical aberrations and other distortions. Through extensive testing on 200 mm silicon wafers fabricated with 0.25 lm photonic BiCMOS technology, we demonstrate that our system achieves consistent coupling efficiency with less than 0.2 dB of repeatability and remarkable stability, with fluctuations within 0.01 dB during 10-minute testing intervals. Our results underline the systems ability to address the critical challenges in modern photonic testing and highlight its potential for improving manufacturing processes in the semiconductor and photonic industries.
(27) Fully Automated Wafer-Level Edge Coupling Measurement System for Silicon Photonics Integrated Circuits
Q. Yuan, A. Peczek, J. Frankel, D. Rishavy, Ch. Mai, E. Christenson, D. Pratap, L. Zimmermann
IEEE Transactions on Semiconductor Manufacturing 38(2), 168 (2025)
DOI: 10.1109/TSM.2025.3552349, (QuantERA)
In this work, we introduce a novel, fully automated wafer-level edge coupling measurement system designed specifically for silicon photonic integrated circuits (PICs). This system integrates state-of-the-art technologies, including optical probes, advanced alignment algorithms, and precision calibration processes, to ensure high coupling efficiency, rapid throughput, and exceptional repeatability. The optical probe, known as the Pharos lens, incorporates a periscope structure to facilitate effective vertical-to-horizontal light conversion, providing ultra-high coupling efficiency. The system also leverages adaptive optics algorithms to enhance measurement accuracy, compensating for optical aberrations and other distortions. Through extensive testing on 200 mm silicon wafers fabricated with 0.25 lm photonic BiCMOS technology, we demonstrate that our system achieves consistent coupling efficiency with less than 0.2 dB of repeatability and remarkable stability, with fluctuations within 0.01 dB during 10-minute testing intervals. Our results underline the systems ability to address the critical challenges in modern photonic testing and highlight its potential for improving manufacturing processes in the semiconductor and photonic industries.
N. Boldt, L. Weirauch, J.M. Späth, U. Kerst, M. Birkholz, M. Baune, R. Thewes
Electrophoresis 46(1-2), 104 (2025)
DOI: 10.1002/elps.202400164, (Bioelectronics)
In this study, the influence of using rectangular waveforms is comprehensively investigated on the separation and sorting efficiency of dielectrophoretic (DEP) processes. Besides positive effects on DEP experiments cases for a diminished force due to rectangular waveforms are investigated and discussed. This investigation encompasses two primary experimental setups. Firstly, microparticle focusing experiments are carried out using a pair of electrodes within a microfluidic channel. Secondly, separation experiments are performed using a macroscopic insulator-based dielectrophoretic filter. The study reveals that harmonics of rectangular signals can have a positive impact on separation or sorting efficiency when compared to sinusoidal waveforms, provided that these harmonics contribute to the overall DEP force with the same sign. This positive effect is found to depend on the ratio between applied fundamental frequency and the cross-over frequency in the Clausius-Mossotti factor. However, violating related derived boundary conditions leads to negative effects and a decrease of the DEP net force.
(2) Impact of Biased Cooling on the Operation of Undoped Silicon Quantum Well Field-Effect Devices for Quantum Circuit Applications
L.K. Diebel, L.G. Zinkl, A. Hötzinger, F. Reichmann, M. Lisker, Y. Yamamoto, D. Bougeard
AIP Advances 15(3), 035301 (2025)
DOI: 10.1063/5.0250968, (QUASAR)
Gate-tunable semiconductor nanosystems are getting more and more important in the realization of quantum circuits. While such devices are typically cooled to operation temperature with zero bias applied to the gate, biased cooling corresponds to a non-zero gate voltage being applied before reaching the operation temperature. We systematically study the effect of biased cooling on different undoped SiGe/Si/SiGe quantum well field-effect stacks designed to accumulate and density-tune two-dimensional electron gases (2DEGs). In an empirical model, we show that biased cooling of the undoped FES induces a static electric field, which is constant at operation temperature and superimposes onto the field exerted by the top gate onto the 2DEG. We show that the voltage operation window of the field-effect-tuned 2DEG can be chosen in a wide range of voltages via the choice of the biased cooling voltage. Importantly, quality features of the 2DEG such as the mobility or the temporal stability of the 2DEG density remain unaltered under biased cooling.
(3) Varactors for Integrated RF Circuits in a 130 nm BiCMOS Technology
M. Elviretti, A. Malignaggi, N. Pelagalli, H. Rücker, L. Menicucci Salamanca, Ch. Wipf, C. Carta, A. Mai
Proc. 16th German Microwave Conference (GeMiC 2025), 368 (2025)
DOI: 10.23919/GeMiC64734.2025.10979116, (SICHER)
(4) Investigating Impacts of Local Pressure and Temperature on CVD Growth of Hexagonal Boron Nitride on Ge(001)/Si
M. Franck, J. Dabrowski, M.A. Schubert. D. Vignaud, M. Achehboune, J.-F. Colomer, L. Henrard, Ch. Wenger, M. Lukosius
Advanced Materials Interfaces 12(1), 2400467 (2025)
DOI: 10.1002/admi.202400467, (2DHetero)
The chemical vapor deposition (CVD) growth of hexagonal boron nitride (hBN) on Ge substrates is a promising pathway to high-quality hBN thin films without metal contaminations for microelectronic applications, but the effect of CVD process parameters on the hBN properties is not well understood yet. The influence of local changes in pressure and temperature due to different reactor configurations on the structure and quality of hBN films grown on Ge(001)/Si is studied. Injection of the borazine precursor close to the sample surface results in an inhomogeneous film thickness, attributed to an inhomogeneous pressure distribution at the surface, as shown by computational fluid dynamics simulations. The additional formation of nanocrystalline islands is attributed to unfavorable gas phase reactions due to the radiative heating of the injector. Both issues are mitigated by increasing the injector-sample distance, leading to an 86% reduction in pressure variability on the sample surface and a 200 °C reduction in precursor temperature. The resulting hBN films exhibit no nanocrystalline islands, improved thickness homogeneity, and high crystalline quality (Raman FWHM = 23 cm−1). This is competitive with hBN films grown on other non-metal substrates but achieved at lower temperature and with a low thickness of only a few nanometers.
(5) A High-Gain 240-325-GHz Power Amplifier for IEEE 802.15.3d Applications in an Advanced BiCMOS Technology
A. Gadallah, A. Malignaggi, B. Sütbas, H. Rücker, D. Kissinger, M.H. Eissa
Proc. 25th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2025), 19 (2025)
(Open 6G Hub)
(6) Strategies to Realize AC Electrokinetic Enhanced Mass-Transfer in Silicon based Photonic Biosensors
A. Henriksson, P. Neubauer, M. Birkholz
Advanced Materials Technologies 10(2), 2302191 (2024)
DOI: 10.1002/admt.202302191, (Bioelectronics)
Silicon-on-insulator (SOI) based photonic sensors, particularly those utilizing Photonic Integrated Circuit (PIC) technology, have emerged as promising candidates for miniaturized bioanalytical devices. These sensors offer real-time responses, occupy minimal space, possess high sensitivity, and facilitate label-free detection. However, like many biosensors, they face challenges when detecting analytes at exceedingly low concentrations due to limitations in mass transport. An intriguing method to enhance mass transfer in microfluidic biosensors is AC electrokinetics. Proof-of-concept experiments have demonstrated significant enhancements in limit of detection (LOD) and response times. AC electrokinetics, compatible with silicon photonic sensors, offers techniques such as electroosmosis, electrothermal effects, and dielectrophoresis to modify fluid flow and manipulate particle trajections. This article delves into various approaches for integrating AC electrokinetics into silicon photonic biosensors, shedding light on both its advantages and limitations.
(7) A High-Speed Linear Modulator Driver for 200-GBd PAM-4 with Low Group Delay Variation in 130-nm SiGe BiCMOS
R. Huber, L. Zimmermann, D. Kissinger
Proc. 16th German Microwave Conference (GeMiC 2025), 132 (2025)
DOI: 10.23919/GeMiC64734.2025.10979042, (DFG EPIC-Sense 2)
(8) Industrially Fabricated Single-Electron Quantum Dots in Si/Si–Ge Heterostructures
T. Huckemann, P. Muster, W. Langheinrich, V. Brackmann, M. Friedrich, N.D. Komericki, L.K. Diebel, V. Stieß, D. Bougeard, Y. Yamamoto, F. Reichmann, M.H. Zoellner, C. Dahl, L.R. Schreiber, H. Bluhm
IEEE Electron Device Letters 46(5), 868 (2025)
DOI: 10.1109/LED.2025.3553672, (IHP - RWTH Aachen / FZ Jülich Joint Lab)
This paper reports the compatibility of heterostructure-based spin qubit devices with industrial CMOS technology. It features Si/Si–Ge quantum dot devices fabricated using Infineon’s 200mm production line within a restricted thermal budget. The devices exhibit state-of-the-art charge sensing, charge noise and valley splitting characteristics, showing that industrial fabrication is not harming the heterostructure quality. These measured parameters are all correlated to spin qubit coherence and qubit gate fidelity. We describe the single electron device layout, design and its fabrication process using electron beam lithography. The incorporated standard 90nm back-end of line flow for gate-layer independent contacting and wiring can be scaled up to multiple wiring layers for scalable quantum computing architectures. In addition, we present millikelvin characterization results. Our work exemplifies the potential of industrial fabrication methods to harness the inherent CMOS-compatibility of the Si/Si–Ge material system, despite being restricted to a reduced thermal budget. It paves the way for advanced quantum processor architectures with high yield and device quality.
(9) 44 GHz Bandwidth Optical Receiver Monolithically Integrated in a SiGe ePIC BiCMOS Technology
F. Iseini, N. Pelagalli, A. Malignaggi, A. Peczek, C. Carta, G. Kahmen
20th IEEE Radio & Wireless Week (RWW 2025), 12 (2025)
(100G)
(10) Broadband and Compact 112 Gbit/s Transimpedance Amplifier in a SiGe Copper Backend Technology
F. Iseini, A. Malignaggi, F. Korndörfer, C. Carta, G. Kahmen
Proc. 16th German Microwave Conference (GeMiC 2025), 601 (2025)
DOI: 10.23919/GeMiC64734.2025.10979095, (100G)
(11) High-Sensitive Broadband Terahertz Detectors for Hyperspectral Imaging
V. Jagtap, U. Kalita, R. Jain, H. Rücker, B. Heinemann, U.R. Pfeiffer
Imaging Sensors, Power Management, PLLs and Frequency Synthesizers, 1st Edition, Editors: K.A.A. Makinwa, A. Baschirotto, B. Nauta, Chapter. High-Sensitive Broadband Terahertz Detectors for Hyperspectral Imaging, Springer, 99 (2025)
DOI: 10.1007/978-3-031-71559-4
(12) Enhancing Device Performance with High Electron Mobility GeSn Materials
Y. Junk, O. Concepción, M. Frauenrath, J. Sun, J.H. Bae, F. Bärwolf, A. Mai, J.-M. Hartmann, D. Grützmacher, D. Buca, Q.-T. Zhao
Advanced Electronic Materials 11(5), 2400561 (2024)
DOI: 10.1002/aelm.202400561
As transistors continue to shrink, the need to replace silicon with materials of higher carrier mobilities becomes imperative. Group-IV semiconductors, and particularly GeSn alloys, stand out for their high electron and hole mobilities, making them attractive for next-generation electronics. While Ge p-channel devices already possess a high hole mobility, here the focus is on enhancing n-channel transistor performance by utilizing the superior electron mobility of GeSn as channel material. Vertical gate-all-around nanowire (GAA NW) transistors are fabricated using epitaxial GeSn heterostructures that leverage the material growth, in situ doping, and band engineering across source/channel/drain regions. It is demonstrated that increasing Sn content in GeSn alloys constantly improves the device performances, reaching a fivefold on-current improvement over standard Ge devices for 11 at.% Sn content. The present results underline the real potential of the GeSn alloys to bring performance and energy efficiency to future nanoelectronics applications.
(13) Electronic-Photonic Integrated Circuits Through Micro-Transfer Printing
H. Liu, T. Pannier, Y. Gu, R. Loi, P. Ramaswamy, P. Steglich, B. Pan, J. Zhang, P. Ossieur, G. Roelkens
Proc. IEEE Silicon Photonics Conference (SiPhotonics 2025), WB3 (2025)
DOI: 10.1109/SiPhotonics64386.2025.10984590, (CALADAN)
(14) Processing and Characterization of High-Density Fe-Silicide/Si Core–Shell Quantum Dots for Light Emission
K. Makihara, Y. Yamamoto, M.A. Schubert, A. Mai, S. Miyazaki
Nanomaterials (MDPI) 15(10), 733 (2025)
DOI: 10.3390/nano15100733
Si-based photonics has garnered considerable attention as a future device for complementary metal–oxide–semiconductor (CMOS) computing. However, few studies have investigated Si-based light sources highly compatible with Si ultra large-scale integration processing. In this study, we observed stable light emission at room temperature from superatom-like β–FeSi2–core/Si–shell quantum dots (QDs). The β–FeSi2–core/Si–shell QDs, with an areal density as high as ~1011 cm−2 were fabricated by self-aligned silicide process of Fe–silicide capped Si–QDs on ~3.0 nm SiO2/n–Si (100) substrates, followed by SiH4 exposure at 400 °C. From the room temperature photoluminescence characteristics, β–FeSi2 core/Si–shell QDs can be regarded as active elements in optical applications because they offer the advantages of photonic signal processing capabilities and can be combined with electronic logic control and data storage.
(15) A Comprehensive Statistical Study of the Post-Programming Conductance Drift in HfO2-based Memristive Devices
D. Maldonado, C. Acal, H. Ortiz, A.M. Aguilera, J.E. Ruiz-Castro, A. Cantudo, A. Baroni, K.D.S. Reddy, S. Pechmann, M. Uhlmann, Ch. Wenger, E. Perez, J.B. Roldan
Materials Science in Semiconductor Processing 196, 109668 (2025)
DOI: 10.1016/j.mssp.2025.109668, (KI-IoT)
(16) In Situ X-Ray Photoelectron Spectroscopy Study of Atomic Layer Deposited Cerium Oxide on SiO2: Substrate Influence on the Reaction Mechanism During the Early Stages of Growth
C. Morales, M. Gertig, M. Kot, C.A. Chavarin, M.A. Schubert, M.H. Zoellner, Ch. Wenger, K. Henkel, J.I. Flege
Advanced Materials Interfaces 12(5), 2400537 (2024)
DOI: 10.1002/admi.202400537, (iCampus II)
Thermal atomic layer deposition (ALD) of cerium oxide using commercial Ce(thd)4 precursor and O3 on SiO2 substrates is studied employing in-situ X-ray photoelectron spectroscopy (XPS). The system presents a complex growth behavior determined by the change in the reaction mechanism when the precursor interacts with the substrate or the cerium oxide surface. During the first growth stage, non-ALD side reactions promoted by the substrate affect the growth per cycle, the amount of carbon residue on the surface, and the oxidation degree of cerium oxide. On the contrary, the second growth stage is characterized by a constant growth per cycle in good agreement with the literature, low carbon residues, and almost fully oxidized cerium oxide films. This distinction between two growth regimes is not unique to the CeOx/SiO2 system but can be generalized to other metal oxide substrates. Furthermore, the film growth deviates from the ideal layer-by-layer mode, forming micrometric inhomogeneous and defective flakes that eventually coalesce for deposit thicknesses above 10 nm. The ALD-cerium oxide films present less order and a higher density of defects than films grown by physical vapor deposition techniques, likely affecting their reactivity in oxidizing and reducing conditions.
(17) Evaluation of Lateral Selective Etching with CF4/H2 Plasma of Si0.7Ge0.3/Si/Si0.7Ge0.3 Layers
K. Ozaki, N. Takada, Y. Imai, T. Tsutsumi, K. Ishikawa, Y. Yamamoto, W.-C. Wen, K. Makihara
Proc. 17th International Symposium on Advanced Plasma Science and its Applications for Nitrides and Nanomaterials/18th International Conference on Plasma-Nano Technology & Science (ISPlasma 2025/IC-Plants 2025), abstr. book 04pA06O (2025)
(18) Testbeam Characterization of a SiGe BiCMOS Monolithic Silicon Pixel Detector with Internal Gain Layer
L. Paolozzi, M. Milanesio, T. Moretti, R. Cardella, T. Kugathasan, A. Picardi, M. Elviretti, H. Rücker, F. Cadoux, R. Cardarelli, L. Cecconi, S. Débieux, Y. Favre, C.A. Fenoglio, D. Ferrere, S. Gonzalez-Sevilla, L. Iodice, R. Kotitsa, C. Magliocca, M. Nessi, A. Pizarro-Medina, J. Saidi, M. Vicente Barreto Pinto, S. Zambito, G. Iacobucci
Journal of Instrumentation 20, P04001 (2025)
DOI: 10.1088/1748-0221/20/04/P04001
A monolithic silicon pixel ASIC prototype, produced in 2024 as part of the Horizon 2020 MONOLITH ERC Advanced project, was tested with a 120 GeV/c pion beam. The ASIC features a matrix of hexagonal pixels with a 100 𝜇m pitch, read by low-noise, high-speed front-end electronics built using 130 nm SiGe BiCMOS technology. It includes the PicoAD sensor, which employs a continuous, deep PN junction to generate avalanche gain. Data were taken across power densities from 0.05 to 2.6 W/cm2 and sensor bias voltages from 90 to 180 V. At the highest bias voltage, corresponding to an electron gain of 50, and maximum power density, an efficiency of (99.99 ± 0.01)% was achieved. The time resolution at this working point was (24.3 ± 0.2) ps before time-walk correction, improving to (12.1 ± 0.3) ps after correction.
(19) Wafer-Scale Experimental Determination of Coupling and Loss for Photonic Integrated Circuit Design Optimisation
D. Schmid, R. Eisermann, A. Peczek, G. Winzer, L. Zimmermann, S. Krenek
Photonics 12(3), 234 (2025)
DOI: 10.3390/photonics12030234, (PhoQuS-T (23FUN01))
We investigate integrated silicon ring resonators with regard to the influence of design parameters and intra-wafer variations. First, we show the effect of different ring radii and gaps between ring and bus waveguide on optical properties (peak width, finesse, Qfactor, and extinction ratio), from which we calculate the resonators’ coupling and loss coefficients. The dependence on the gap of these properties is discussed at the wafer scale. Second, by incorporating the spectra of 2242 resonators from 59 nominally identical dies on a 200mm wafer, we show how these properties depend on the resonators’ position on the wafer. Third, we demonstrate how curve fitting of loss and coupling coefficients as a function of the gaps can be used to estimate the optimal gap that realizes critical coupling with a significantly reduced number of manufactured test structures needed to find optimal design parameters.
(20) Growth of Boron-Doped Germanium Single Crystals by the Czochralski Method
A.N. Subramanian, M.P. Kabukcuoglu, C. Richter, U. Juda, R. Kernke, F. Bärwolf, E. Hamann, M. Zuber, N.V. Abrosimov, R.R. Sumathi
Crystal Growth & Design 25(4), 1075 (2025)
DOI: 10.1021/acs.cgd.4c01413
In this paper, we present the growth of boron-doped germanium single crystals using the Czochralski method. Boron was introduced into the solid phase prior to the initiation of the growth experiment. Enhanced dissolution of boron in the germanium melt was observed at higher temperatures, facilitating the single crystalline growth. The distribution of boron along the crystal length was quantified at several positions using secondary ion mass spectrometry, with concentrations reaching up to 1018 atoms/cm3 near the seed (top region) of the grown crystals. These results are compared with the theoretically predicted boron segregation profile calculated using the Scheil–Pfann equation. Additionally, the structural quality of the crystals was examined by using etch pit density measurement and X-ray diffraction techniques, including synchrotron white-beam X-ray topography and X-ray rocking curve imaging. It is shown that variations in boron concentrations in the 0–0.5 solidified fractions (g) of the grown crystals lead to a strain field along the growth direction. Finally, the feasibility and challenges of growing heavily boron-doped germanium crystals from the melt while maintaining a single crystallinity with a low dislocation density are discussed.
(21) A Fully Integrated 0.48 THz FMCW Radar Sensor in a SiGe Technology
F. Vogelsang, J. Bott, D. Starke, M. Hamme, B. Sievert, H. Rücker, N. Pohl
IEEE Journal of Microwaves 5(3), 572 (2025)
DOI: 10.1109/JMW.2025.3553681
The THz gap has been a significant research objective for photonics and electronics for decades. This work introduces a fully integrated frequency modulated continuous wave (FMCW) radar sensor with a center frequency of 0.48 THz, realized in a silicon-germanium (SiGe) technology. The sensor consists of a THz MMIC integrated onto a front-end printed circuit board (PCB) with FR4 substrate used for frequency synthesis and IF signal amplification. A dielectric polytetrafluoroethylene (PTFE) lens is mounted above the MMIC to act as transmitter (Tx) and receiver (Rx) lens as well as a physical protection for the bond wires of the MMIC. A back-end PCB generates the supply voltages and control signals, and its analog-digital-converter (ADC) samples the IF signal. The whole sensor is just 4.9 cm by 4.3 cm in size and is cost-efficient due to its design with FR4 PCBs. The MMIC reaches an output power of up to −9 dBm. In FMCW operation with the full sensor, a tuning range of 49 GHz is reached along an equivalent isotropic radiated power (EIRP) of up to 22 dBm. Distance measurements were successfully tested for distances of up to 5 m, and a radiation pattern is presented. In summary, this article demonstrates the potential of SiGe technology in the THz range for applications like localization, material characterization, and communication.
(22) Three-Dimensional Self-Ordering and Alignment Control of Ge Nanodots Fabricated by Chemical Vapor Deposition
W.-C. Wen, B. Tillack, Y. Yamamoto
Proc. 17th International Symposium on Advanced Plasma Science and its Applications for Nitrides and Nanomaterials/18th International Conference on Plasma-Nano Technology & Science (ISPlasma2025/IC-PLANTS 2025), abstr. book 05pB09I (2025)
(23) SiGe BiCMOS Wafer-Level Packaging and Antenna Integration for Sub-THz Applications
M. Wietstruck, S. Schulze, P. Krüger, T. Voß, M.F. Bashir, S. Tolunay Wipf, E.C. Durmaz, K. Joy
Proc. 16th German Microwave Conference (GeMiC 2025), 354 (2025)
DOI: 10.23919/GeMiC64734.2025.10979099, (iCampus II)
(24) Piezoresistivity of Epitaxial SiGe
Y. Yamamoto, W.-C. Wen, N. Inomata, A.A. Corley-Wiciak, D. Ryzhak, C. Corley-Wiciak, Z. Zhijian, R. Sorge, B. Tillack, T. Ono
ECS Journal of Solid State Science and Technology 14(4), 045001 (2025)
DOI: 10.1149/2162-8777/adc488
Piezoresistivity of B- and P-doped epitaxial Si1-xGex (x=10-30%) is investigated to assess its application potential for thin film strain sensors. The gauge factor (GF) is calculated based on the change in resistivity to the externally induced compressive uniaxial strain along the current flow direction. In the case of B-doped SiGe, the resistivity decreases under the induced compressive strain which may be related to hole mobility enhancement, while no influence on the resistivity of the P-doped SiGe. A significant increase in the GF is observed by lowering B concentration. At the same B concentration, slightly higher GF is observed for higher Ge content. Moreover, the GF is slightly improved by lowering the SiGe growth temperature, which may be related to improved crystallinity indicated by capacitance-voltage characteristics of metal-oxide-semiconductor structure using the epitaxial SiGe on Si. These results suggest that the low-doped p-type SiGe deposited at low temperature has reasonable GF and can potentially be applied in strain sensors.
(25) Fully Automated Wafer-Level Edge Coupling Measurement System for Silicon Photonics Integrated Circuits
Q. Yuan, A. Peczek, J. Frankel, D. Rishavy, Ch. Mai, E. Christenson, D. Pratap, L. Zimmermann
IEEE Transactions on Semiconductor Manufacturing 38(2), 168 (2025)
DOI: 10.1109/TSM.2025.3552349, (QISSME)
In this work, we introduce a novel, fully automated wafer-level edge coupling measurement system designed specifically for silicon photonic integrated circuits (PICs). This system integrates state-of-the-art technologies, including optical probes, advanced alignment algorithms, and precision calibration processes, to ensure high coupling efficiency, rapid throughput, and exceptional repeatability. The optical probe, known as the Pharos lens, incorporates a periscope structure to facilitate effective vertical-to-horizontal light conversion, providing ultra-high coupling efficiency. The system also leverages adaptive optics algorithms to enhance measurement accuracy, compensating for optical aberrations and other distortions. Through extensive testing on 200 mm silicon wafers fabricated with 0.25 lm photonic BiCMOS technology, we demonstrate that our system achieves consistent coupling efficiency with less than 0.2 dB of repeatability and remarkable stability, with fluctuations within 0.01 dB during 10-minute testing intervals. Our results underline the systems ability to address the critical challenges in modern photonic testing and highlight its potential for improving manufacturing processes in the semiconductor and photonic industries.
(26) Fully Automated Wafer-Level Edge Coupling Measurement System for Silicon Photonics Integrated Circuits
Q. Yuan, A. Peczek, J. Frankel, D. Rishavy, Ch. Mai, E. Christenson, D. Pratap, L. Zimmermann
IEEE Transactions on Semiconductor Manufacturing 38(2), 168 (2025)
DOI: 10.1109/TSM.2025.3552349, (PEARLS)
In this work, we introduce a novel, fully automated wafer-level edge coupling measurement system designed specifically for silicon photonic integrated circuits (PICs). This system integrates state-of-the-art technologies, including optical probes, advanced alignment algorithms, and precision calibration processes, to ensure high coupling efficiency, rapid throughput, and exceptional repeatability. The optical probe, known as the Pharos lens, incorporates a periscope structure to facilitate effective vertical-to-horizontal light conversion, providing ultra-high coupling efficiency. The system also leverages adaptive optics algorithms to enhance measurement accuracy, compensating for optical aberrations and other distortions. Through extensive testing on 200 mm silicon wafers fabricated with 0.25 lm photonic BiCMOS technology, we demonstrate that our system achieves consistent coupling efficiency with less than 0.2 dB of repeatability and remarkable stability, with fluctuations within 0.01 dB during 10-minute testing intervals. Our results underline the systems ability to address the critical challenges in modern photonic testing and highlight its potential for improving manufacturing processes in the semiconductor and photonic industries.
(27) Fully Automated Wafer-Level Edge Coupling Measurement System for Silicon Photonics Integrated Circuits
Q. Yuan, A. Peczek, J. Frankel, D. Rishavy, Ch. Mai, E. Christenson, D. Pratap, L. Zimmermann
IEEE Transactions on Semiconductor Manufacturing 38(2), 168 (2025)
DOI: 10.1109/TSM.2025.3552349, (QuantERA)
In this work, we introduce a novel, fully automated wafer-level edge coupling measurement system designed specifically for silicon photonic integrated circuits (PICs). This system integrates state-of-the-art technologies, including optical probes, advanced alignment algorithms, and precision calibration processes, to ensure high coupling efficiency, rapid throughput, and exceptional repeatability. The optical probe, known as the Pharos lens, incorporates a periscope structure to facilitate effective vertical-to-horizontal light conversion, providing ultra-high coupling efficiency. The system also leverages adaptive optics algorithms to enhance measurement accuracy, compensating for optical aberrations and other distortions. Through extensive testing on 200 mm silicon wafers fabricated with 0.25 lm photonic BiCMOS technology, we demonstrate that our system achieves consistent coupling efficiency with less than 0.2 dB of repeatability and remarkable stability, with fluctuations within 0.01 dB during 10-minute testing intervals. Our results underline the systems ability to address the critical challenges in modern photonic testing and highlight its potential for improving manufacturing processes in the semiconductor and photonic industries.
