Publications 2024
Script list Publications
(1) A 220—320 GHz High Image Rejection Sideband Separating Receiver for Space-Borne Observatories
E.M. Al Seragi, Y.L. Rajendra, W. Ahmad, M. Kaynak, P.F. Goldsmith, S. Zeinoladedinzadeh
IEEE Transactions on Terahertz Science and Technology 14(2), 162 (2024)
DOI: 10.1109/TTHZ.2024.3349483
This work presents a novel terahertz THz sideband separating receiver (SSR) implemented in silicon germanium (SiGe) 0.13 μm BiCMOS technology that covers a broad frequency range of 220-320 GHz. The proposed architecture provides simultaneous observation of spectral lines with high image rejection ratio (IRR) across the entire operating frequency range. The double down conversion architecture with a first mixer operating as a sub-harmonic mixer was configurated as a sideband separating receiver leveraging the Weaver topology to provide two differential channels, one for the upper sideband (USB) and one for the lower sideband (LSB). The presented design demonstrates an IRR exceeding 20 dB across the entire frequency range of 220-320 GHz, without the need for calibration. To the best of the author's knowledge, this is the first reported H-band simultaneous sideband separation receiver in silicon technology. The fabricated receiver measures 1.2×1 mm2 and consumes 19 mW (not including LO power consumption), showcasing its potential for application in multiple-pixel arrays for space-borne observations.
(2) Adhesive-Free Bonding for Hetero-Integration of InP based Coupons Micro-Transfer Printed on SiO2 into Complementary Metal-Oxide-Semiconductor Backend for Si Photonics Application on 8” Wafer Platform
K. Anand, P. Steglich, J. Kreissl, C.A. Chavarin, D. Spirito, M. Franck, G. Lecci, I. Costina, N. Herfurth, J. Katzer, Ch. Mai, A. Becker, J.P. Reithmaier, L. Zimmermann, A. Mai
Thin Solid Films 799, 140399 (2024)
DOI: 10.1016/j.tsf.2024.140399, (FMD)
Micro-Transfer printing (µTP) is a promising technique for hetero-integration of III-V materials into Si-based photonic platforms. To enhance the print yield by increasing the adhesion between the III-V material and Si or SiO2 surface, an adhesion promoter like Benzocyclobutene is typically used as interlayer. In this work, we demonstrate µTP of InP based coupons on SiO2 interlayer without any adhesive interlayer and investigate the mechanism of adhesive free bonding. Source coupons are InP-based coupon stacks on a sacrificial layer that is removed by a chemical wet etch with FeCl3. For the target we fabricated amorphous-Si waveguides on 8" wafer encapsulated by a High Density Plasma SiO2 which was planarized by a chemical mechanical polishing procedure. We used O2 plasma to activate both source and target to increase adhesion between coupon and substrate. To get a better understanding of the bonding mechanism we applied several surface characterization methods. Root mean square roughness of InP and SiO2 was measured by atomic force microscopy before and after plasma activation. The step height of the micro-transfer printed source coupon on the target wafer is estimated by optical step profiler. We used Raman peak position mappings of InP to analyze possible strain and contact angle measurements on SiO2, before and after plasma activation to observe a change in the hydrophilicity of the surface. X-ray Photoelectron Spectroscopy analysis was used to characterize the surface energy states of P2p, In3d, O1s for InP source and Si2p, O1s for SiO2 target. Our results demonstrate direct bonding of InP coupons by means of µTP without the need of a strain-compensation layer. In this way, a promising route towards Complementary Metal-Oxide-Semiconductor compatible use of µTP for the hetero-integration of InP is provided.
(3) Adhesive-Free Bonding for Hetero-Integration of InP based Coupons Micro-Transfer Printed on SiO2 into Complementary Metal-Oxide-Semiconductor Backend for Si Photonics Application on 8” Wafer Platform
K. Anand, P. Steglich, J. Kreissl, C.A. Chavarin, D. Spirito, M. Franck, G. Lecci, I. Costina, N. Herfurth, J. Katzer, Ch. Mai, A. Becker, J.P. Reithmaier, L. Zimmermann, A. Mai
Thin Solid Films 799, 140399 (2024)
DOI: 10.1016/j.tsf.2024.140399, (PEARLS)
Micro-Transfer printing (µTP) is a promising technique for hetero-integration of III-V materials into Si-based photonic platforms. To enhance the print yield by increasing the adhesion between the III-V material and Si or SiO2 surface, an adhesion promoter like Benzocyclobutene is typically used as interlayer. In this work, we demonstrate µTP of InP based coupons on SiO2 interlayer without any adhesive interlayer and investigate the mechanism of adhesive free bonding. Source coupons are InP-based coupon stacks on a sacrificial layer that is removed by a chemical wet etch with FeCl3. For the target we fabricated amorphous-Si waveguides on 8" wafer encapsulated by a High Density Plasma SiO2 which was planarized by a chemical mechanical polishing procedure. We used O2 plasma to activate both source and target to increase adhesion between coupon and substrate. To get a better understanding of the bonding mechanism we applied several surface characterization methods. Root mean square roughness of InP and SiO2 was measured by atomic force microscopy before and after plasma activation. The step height of the micro-transfer printed source coupon on the target wafer is estimated by optical step profiler. We used Raman peak position mappings of InP to analyze possible strain and contact angle measurements on SiO2, before and after plasma activation to observe a change in the hydrophilicity of the surface. X-ray Photoelectron Spectroscopy analysis was used to characterize the surface energy states of P2p, In3d, O1s for InP source and Si2p, O1s for SiO2 target. Our results demonstrate direct bonding of InP coupons by means of µTP without the need of a strain-compensation layer. In this way, a promising route towards Complementary Metal-Oxide-Semiconductor compatible use of µTP for the hetero-integration of InP is provided.
(4) Leveraging Lookup Tables for Efficient LDO Design Exploration using Open-Source CAD Tools and IHP-Open130-G2 PDK
D. Arevalos, J. Marin, C. Rojas, K. Herman
31st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2024), abstr. book 53 (2024)
(5) A Highly Efficient 240-GHz Power Amplifier in 0.13-μm SiGe
K. Balaban, M. Kaynak, A.C. Ulusoy
IEEE Microwave and Wireless Technology Letters (MWTL) 34(1), 88 (2024)
DOI: 10.1109/LMWT.2023.3328934
This letter presents the design and experimental characterization of a highly efficient WR3.4-band power amplifier (PA) using 0.13-μm SiGe technology. The realized differential cascode PA demonstrates a high efficiency, owing to the gm-boosting technique which enables a relatively higher small-signal gain per stage. The proposed PA exhibits a saturated output power of 10.48 dBm with a maximum power-added-efficiency (PAE) of 5.46% at 240 GHz , which is a leading-edge performance among the reported silicon (Si)-based WR3.4-band PAs. The small-signal gain peaks at 24.1 dB and the PA has a 3-dB bandwidth of 21 GHz.
(6) Design and Investigation of 2x2 Dielectric Resonator Antennas Array for sub-THz Applications
M.F. Bashir, M. Wietstruck
18th European Conference on Antennas and Propagation (EuCAP 2024), (2024)
DOI: 10.23919/EuCAP60739.2024.10501657
(7) Design of 240 GHz Dielectric Resonator Antenna in 130 nm SiGe BiCMOS Process
M.F. Bashir, M. Wietstruck
15th German Microwave Conference (GeMIC 2024), 73 (2024)
DOI: 10.23919/GeMiC59120.2024.10485246
(8) Sub-THz Substrate Integrated Waveguide Signal Transitions in Backend-of-Line of a Silicon Process
A. Bhutani, M. Kaynak, M. Wietstruck, E. Bekker, I.K. Aksoyak, J. Hebeler, T. Zwick
Proc. 18th European Conference on Antennas and Propagation (EuCAP 2024), (2024)
DOI: 10.23919/EuCAP60739.2024.10501393
(9) Innovations in Electronics – Friend or Foe in Achieving Sustainability?
M. Birkholz
Proc. Electronics Goes Green Conference (EGG 2024), 231 (2024)
(Bioelectronics)
(10) The Chip-Level in-Plane Stress Distribution over BiCMOS Wafers
Z. Cao, T. Voss, M. Wietstruck, C. Carta, M. Kaynak
Proc. 24th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2024), 45 (2024)
DOI: 10.1109/SiRF59913.2024.10438504, (FLEXCOM)
(11) Optimization of the Metal Deposition Process for the Accurate Estimation of Low Metal-Graphene Contact-Resistance
D. Capista, R. Lukose, F. Majnoon, M. Lisker, Ch. Wenger, M. Lukosius
Proc. 47th International ICT and Electronics Convention (MIPRO 2024), 1561 (2024)
DOI: 10.1109/MIPRO60963.2024.10569895, (2D-EPL)
(12) A 300 GHz x9 Multiplier Chain with 9.6 dBm Output Power in 0.13-μm SiGe Technology
A. Chandra-Prabhu, J. Grzyb, P. Hillger, T. Bücher, H. Rücker, U. Pfeiffer
Proc. 24th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2024), 37 (2024)
DOI: 10.1109/SiRF59913.2024.10438581, (DFG-Dotseven2IC)
(13) A 240-GHz VMPS with 1.2° and 0.35 dB RMS Errors in 130 nm BiCMOS:C Technology
M.H. Eissa, Ch. Wipf, A. Malignaggi, G. Kahmen
IEEE Microwave and Wireless Technology Letters (MWTL) 34(3), 295 (2024)
DOI: 10.1109/LMWT.2024.3357203
This work presents a low phase error (PE) and amplitude error (AE) vector modulator phase shifter (VMPS) in the J -band. The influence of the IQ crosstalk RF impairment on the performance is analyzed for different vector summation implementations, guiding to the VMPS architecture choice and design optimization. The chosen architecture consists of an IQ analog-controlled voltage-gain amplifier (IQ-VGA), Branchline coupler, and a Wilkinson combiner. Test structures for the variable-gain amplifier (VGA) and the VMPS are manufactured and measured in a 130-nm BiCMOS technology (fT / fmax = 300/500 GHz). For the phase resolution of 11.25°, the VMPS achieves an average rms PE and AE of 1.2° and 0.35 dB, respectively, with equivalent to 5.5 -bits control voltage across the frequency band 220–260 GHz. The VMPS consumes 60 mW from 2.5-V supply and occupies 0.2 mm 2 of silicon area. This work presents the least PE and AE across a wide bandwidth for VMPS in silicon technologies above 200 GHz, which is crucial for large-scale beam-steering arrays.
(14) Epitaxial Growth of Nd2O3 Layers on Virtual SiGe Substrates on Si(111)
H. Genath, M.A. Schubert, H. Yamtomo, J. Krügener, H.J. Osten
Journal of Applied Physics 135(11), 115302 (2024)
DOI: 10.1063/5.0191350
This study explores the growth and structural characteristics of Nd2O3 layers on virtual germanium-rich SiGe substrates on Si(111). We focus on the emergence of the hexagonal phase depending on the stoichiometry of the virtual substrate. X-ray diffraction measurements reveal a hexagonal phase when Nd2O3 is grown directly on Si(111), while growth on Ge leads to a cubic oxide structure. On SiGe layers, the growth of the oxide results in a mixed phase containing hexagonal and cubic regions, regardless of the Ge content. The cubic structure grown on virtual Ge substrates exhibits strong tensile strain, while layers grown on SiGe layers show no strain. In situ growth control via electron diffraction shows a dependence of the oxide structure of the surface reconstruction of the virtual substrate. Growth on a 7×7 reconstruction leads to hexagonal parts on Si-based substrates, while growth on c(2×8) results in cubic oxide growth on Ge. Furthermore, oxide layers grown on virtual SiGe substrates form an interfacial silicate layer. The thickness of the interfacial layer is influenced by the Si content and the structure of the oxide layer enabling oxygen diffusion pathways.
(15) Improving Epitaxial Growth of γ-Al2O3 Films via Sc2O3/Y2O3 Oxide Buffers
S. Gougam, M.A. Schubert, D. Stolarek, S.B. Thapa, M.H. Zoellner
Advanced Materials Interfaces 221(12), 2400228 (2024)
DOI: 10.1002/pssa.202400228, (GaN HEMT support)
Heteroepitaxial growth of γ-Al2O3 on Sc2O3/Y2O3/Si (111) is achieved with oxygen plasma-assisted molecular beam epitaxy in order to prevent polycrystalline grain boundary formation caused by lattice mismatch. Substrate temperature as well as oxygen flow are adjusted to optimize epitaxial growth conditions around 715–760 °C and 1.9 sccm, respectively. Epitaxial growth is monitored in situ by reflection high-energy diffraction, while surface morphology is studied by scanning electron microscopy ex-situ. X-ray diffraction indicates epitaxial out-of-plane 111 orientation with oxygen flow above 0.6 sccm. However, transmission electron microscopy shows stacking fault formation for high oxygen flows. Finally, nanobeam electron diffraction confirms Smrčok model of a spinel-like γ-Al2O3 crystal structure.
(16) FOSS CAD for the Compact Verilog-A Model Standardization in Open Access PDKs
W. Grabinski, R. Scholz, J. Verley, E.R. Keiter, H. Vogt, D. Warning, P. Nenzi, F. Lannutti, F. Salfelder, A. Davis, M. Brinson, B. Virdee, G. Torri, D. Tomaszewski, M. Bucher, J.-M. Sallese, M. Müller, P. Kuthe, M. Krattenmacher
Proc. 8th IEEE Electron Devices Technology and Manufacturing (EDTM 2024), (2024)
DOI: 10.1109/EDTM58488.2024.10511990, (FMD-QNC)
(17) An On-Chip Antenna-Coupled Preamplified D-Band to J-Band Total Power Radiometer Chip in 130 nm SiGe BiCMOS Technology
J. Grzyb, M. Andree, H. Rücker, U.R. Pfeiffer
Proc. IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2024), 359 (2024)
DOI: 10.1109/RFIC61187.2024.10599964
(18) Evaluating an Open-Source Hardware Approach from HDL to GDS for a Security Chip Design – A Review of the Final Stage of Project HEP
T. Henkes, S. Reith, M. Stöttinger, N. Herfurth, G. Panic, J. Wälde, F. Buschkowski, P. Sasdrich, C. Lüth, M. Funck, T. Kiyan, A. Weber, D. Boeck, R. Rathfelder, T. Grawunder
Proc. 27th Design, Automation and Test in Europe (DATE 2024), (2024)
(VE-HEP)
(19) Design and Simulation of Si-Photonic Nanowire-Waveguides with DEP Concentration Electrodes for Biosensing Applications
A. Henriksson, P. Neubauer, M. Birkholz
zu finden unter: https://arxiv.org/abs/2406.19534
(Bioelectronics)
(20) Półprzewodnikowa Rewolucja w Domenie Open Source
K. Herman, A. Sojka-Piotrowska
Elektronika Praktyczna 5, 2024
(FMD-QNC)
The keyword "open source" is associated by most people primarily with software developed by IT enthusiasts and made available for free to the worldwide community of users. No less interesting is the group of open hardware solutions so called open source hardware. A few people know that there are already free software packages designed to design integrated circuits, including even ASICs with bandwidths of hundreds of GHz. Even more surprising may be the fact that semiconductor factories are also opening their doors to small businesses, academic partners and even.... private customers!
(21) Reflections on the First European Open Source PDK by IHP – Experiences After One Year and Future Activities
K. Herman, R. Scholz, S. Andreev
Proc. 31st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2024), abstr. book 19 (2024)
(22) On the Versatility of the IHP BiCMOS Open Source and Manufacturable PDK: A Step Towards the Future where Anybody can Design and Build a Chip
K. Herman, N. Herfurth, T. Henkes, S. Andreev, R. Scholz, M. Müller, M. Krattenmacher, H. Pretl, W. Grabinski
IEEE Solid-State Circuits Magazine 16(2), 30 (2024)
DOI: 10.1109/MSSC.2024.3372907, (FMD-QNC)
In this article, we introduce the first European opensource process design kit, namely IHP-Open130-G2. We provide a concise history of the PDK itself and offer a brief comparison with some alternative open-source PDKs, such as SKY130 and GF180. The article also includes a process description and details on deliverables, offering insights into available devices, models, supported open-source tools, and workflows. As the IHPOpen130-G2 is currently under development, we present key points outlining future activities. This aims to inform and attract users to join the open-source silicon community. The concluding section of the article compares measurement results for active devices with compact model results. The article concludes with a cryptographic IP core based on IHP-Open130-G2 as an exemplary use case.
(23) Strain and Optical Characteristics Analyses of 3-Dimentional Self-Ordered Multilayered SiGe Nanodots by Photoluminescence and Raman Spectroscopy
Y. Ito, R. Yokogawa, W.-C. Wen, Y. Yamamoto, T. Minowa, A. Ogura
Japanese Journal of Applied Physics 63(3), 035SP61 (2024)
DOI: 10.35848/1347-4065/ad231e
The strain state, optical properties, and band structure of the self-ordered multilayered silicon-germanium (SiGe) nanodots, which are staggered and dot-on-dot alignment and embedded by Si spacer, were evaluated by Raman spectroscopy and low-temperature Photoluminescence (PL). These results suggest that the compressive strain applied to the staggered nanodots is smaller than that of the dot-on-dot nanodots, which contributes to the shrinking of the bandgap of the staggered nanodots. Strong PL intensity was observed from the nanodots compared to the single crystalline bulk SiGe due to the carrier confinement and high crystal quality of the nanodots. The stack-controlled nanodots showed a redshift of the PL peaks compared to the bulk SiGe and the effect of strain induced in SiGe nanodots might not be enough to explain this phenomenon. The cause of the redshift was clarified by considering the hetero band structure of the nanodots and the tensile strained spacer.
(24) Complex Electro-Optic Frequency-Response Characterization of a Si Ring Modulator
Y. Jo, Y Ji, H.-K. Kim, St. Lischke, Ch. Mai, L. Zimmermann, W.-Y. Choi
Proc. IEEE Silicon Photonics Conference (SiPhotonics 2024), WA4 (2024)
DOI: 10.1109/SiPhotonics60897.2024.10544200, (MPW_ePIC)
(25) Integration Concept of Plasmonic TiN Nanohole Arrays in a 200 mm BiCMOS Si Technology for Refractive Index Sensor Applications
J. Jose, Ch. Mai, S. Reiter, Ch. Wenger, I.A. Fischer
Proc. iCampus Cottbus Conference (iCCC 2024), 96 (2024)
DOI: 10.5162/iCCC2024/7.2, (iCampus)
(26) A 4-λ × 28-Gb/s/λ Silicon Ring-Resonator-based WDM Receiver with a Reconfigurable Temperature Controller
H.-K. Kim, J.-H. Lee, M. Kim, Y. Jo, St. Lischke, Ch. Mai, L. Zimmermann, W.-Y. Choi
IEEE Journal of Lightwave Technology 42(7), 2296 (2024)
DOI: 10.1109/JLT.2023.3337820
We present a 4-λ × 28-Gb/s/λ silicon ring-resonator-based hybrid-integrated WDM receiver along with the reconfigurable temperature controller. Each of four ring resonators is thermally controlled so that only the target wavelength can be delivered to an integrated photodetector and processed with a hybrid-integrated CMOS TIA. The controller automatically determines the heater voltage required for each ring resonator to receive any target wavelength and maintains this condition against any external temperature fluctuations. It is experimentally verified that the controller performs its task during the initial calibration process and against the thermal stress. In addition, using the controller, WDM channel reconfiguration is successfully demonstrated.
(27) Total-Ionizing-Dose Radiation Hardness of PJFETs Integrated in a 130nm SiGe BiCMOS Technology
F. Korndörfer, J. Schmidt, R. Sorge
Proc. iCampus Cottbus Conference (iCCC 2024), 199 (2024)
DOI: 10.5162/iCCC2024/P26
(28) Rational Design and Development of Room Temperature Hydrogen Sensors Compatible with CMOS Technology: A Necessary Step for the Coming Renewable Hydrogen Economy
J. Kosto, R. Tschammer, C. Morales, K. Henkel, C.A. Chavarin, I. Costina, M. Ratzke, Ch. Wenger, I.A. Fischer, J.I. Flege
Proc. iCampus Confernce Cottbus (iCCC 2024), 182 (2024)
DOI: 10.5162/iCCC2024/P21
(29) Technical and Societal Requirements for Handling of Personal Data on Wearable Devices
M. Kögler, J. Hooyberghs, M. Birkholz
Electronics Goes Green Conference (EGG 2024), 726 (2024)
(Bioelectronics)
(30) A 112-Gb/s Hybrid-Integrated Si Photonic WDM Receiver with Ring-Resonator Filters
J-H. Lee, H.-K. Kim, M. Kim, Y. Jo, St. Lischke, Ch. Mai, L. Zimmermann, W.-Y. Choi
Proc. IEEE Silicon Photonics Conference (SiPhotonics 2024), TuP14 (2024)
DOI: 10.1109/SiPhotonics60897.2024.10543480, (MPW_ePIC)
(31) Ultra-Fast Ge-on-Si Photodetectors
St. Lischke, D. Steckler, A. Peczek, J. Morgan, A. Beling, L. Zimmermann
Proc. Optical Fiber Communications Conference and Exposition (OFC 2024), Tu3D.1 (2024)
(PEARLS)
(32) Ultra-Fast Ge-on-Si Photodetectors
St. Lischke, D. Steckler, A. Peczek, J. Morgan, A. Beling, L. Zimmermann
Proc. Optical Fiber Communications Conference and Exposition (OFC 2024), Tu3D.1 (2024)
(CBQD)
(33) Ultra-Fast Ge-on-Si Photodetectors
St. Lischke, D. Steckler, A. Peczek, J. Morgan, A. Beling, L. Zimmermann
Proc. Optical Fiber Communications Conference and Exposition (OFC 2024), Tu3D.1 (2024)
(DFG EPIC-Sense 2)
(34) Ultra-Fast Ge-on-Si Photodetectors
St. Lischke, D. Steckler, A. Peczek, J. Morgan, A. Beling, L. Zimmermann
Proc. Optical Fiber Communications Conference and Exposition (OFC 2024), Tu3D.1 (2024)
(DFG EPIDAC)
(35) Ultra-Fast Ge-on-Si Photodetectors
St. Lischke, D. Steckler, A. Peczek, J. Morgan, A. Beling, L. Zimmermann
Proc. Optical Fiber Communications Conference and Exposition (OFC 2024), Tu3D.1 (2024)
(plaCMOS)
(36) Alternative Fabrication Method for Ge-Fin Photodiodes with 3-dB Bandwidths Exceeding 110 GHz
St. Lischke, J. Jose, D. Steckler, A. Kroh, A. Peczek, L. Zimmermann
Proc. IEEE Silicon Photonics Conference (SiPhotonics 2024), MBH6 (2024)
DOI: 10.1109/SiPhotonics60897.2024.10543707, (DFG EPIC-Sense 2)
(37) Alternative Fabrication Method for Ge-Fin Photodiodes with 3-dB Bandwidths Exceeding 110 GHz
St. Lischke, J. Jose, D. Steckler, A. Kroh, A. Peczek, L. Zimmermann
Proc. IEEE Silicon Photonics Conference (SiPhotonics 2024), MBH6 (2024)
DOI: 10.1109/SiPhotonics60897.2024.10543707, (CBQD)
(38) Graphene for Photonic Applications
M. Lukosius, R. Lukose, P.K. Dubey, A.I. Raju, M. Lisker, A. Mai, Ch. Wenger
Proc. 47th International ICT and Electronics Convention (MIPRO 2024), 1614 (2024)
DOI: 10.1109/MIPRO60963.2024.10569652, (2D-EPL)
(39) Electron Emission from Alignment-Controlled Multiple Stacks of SiGe Nanodots Embedded in Si Structures
K. Makihara, Y. Yamamoto, H. Yagi, L. Li, N. Taoka, B. Tillack, S. Miyazaki
Materials Science in Semiconductor Processing 174, 108227 (2024)
DOI: 10.1016/j.mssp.2024.108227
We fabricated a vertically aligned and staggered structure comprising 20–stacking layers of SiGe–nanodots (NDs) embedded in Si via reduced–pressure chemical vapor deposition and investigated their electron emission properties. The SiGe–NDs with a 35% Ge content were deposited using SiH4–GeH4, while Si spacers were deposited using SiH4 or SiH2Cl2 to control a 3D–alignment of staggered or dot–on–dot structure, respectively. Top Au electrodes with 5–nm–thick SiO2 and bottom Al contact were fabricated for electron emission measurements. After applying a bias of −3.8 V to the bottom Al–electrode with respect to the grounded top Au–electrode, electron emission was observed from the staggered SiGe–ND stack, which was slightly lower than that of the vertically–aligned NDs. In addition, we also observed a reduction in sample current with the formation of the staggered SiGe–ND stack. These results indicate that aligning SiGe–NDs in a staggered configuration suppresses leakage current and improves electron emission efficiency.
(40) Influence of Stop and Gate Voltage on Resistive Switching of 1T1R HfO2-based Memristors, a Modeling and Variability Analysis
D. Maldonado, A. Cantudo, K.D.S. Reddy, S. Pechmann, M. Uhlmann, Ch. Wenger, J.B. Roldán, E. Pérez
Materials Science in Semiconductor Processing 182, 108726 (2024)
DOI: 10.1016/j.mssp.2024.108726, (KI-IoT)
Memristive devices, particularly resistive random access memory (RRAM) cells based on hafnium oxide (HfO₂) dielectrics, exhibit promising characteristics for a wide range of applications. In spite of their potential, issues related to intrinsic variability and the need for precise simulation tools and modeling methods remain a medium-term hurdle. This study addresses these challenges by investigating the resistive switching (RS) behavior of different 1T1R HfO₂-based memristors under various experimental conditions. Through a comprehensive experimental analysis, we extract RS parameters using different numerical techniques to understand the cycle-to-cycle (C2C) and device-to-device (D2D) variability. Additionally, we employ advanced simulation methodologies, including circuit breaker-based 3D simulation, to shed light on our experimental findings and provide a theoretical framework to disentangle the switching phenomena. Our results offer valuable insights into the RS mechanisms and variability, contributing to the improvement of robust parameter extraction methods, which are essential for the industrial application of memristive devices.
(41) Time Resolution of a SiGe BiCMOS Monolithic Silicon Pixel Detector without Internal Gain Layer with a Femtosecond Laser
M. Milanesio, L. Paolozzi, T. Moretti, A. Latshaw, L. Bonacina, R. Cardella, T. Kugathasan, A. Picardi, M. Elviretti, H. Rücker, R. Cardarelli, L. Cecconi, C. A. Fenoglio, D. Ferrere, S. Gonzalez-Sevilla, L. Iodice, R. Kotitsa, C. Magliocca, M. Nessi, A. Pizarro-Medina, J. Sabater Iglesias, I. Semendyaev, J. Saidi, M. Vicente Barreto Pinto, S. Zambito, G. Iacobucci
Journal of Instrumentation 19, P04029 (2024)
DOI: 10.1088/1748-0221/19/04/P04029
The time resolution of the second monolithic silicon pixel prototype produced for the MONOLITH H2020 ERC Advanced project was studied using a femtosecond laser. The ASIC contains a matrix of hexagonal pixels with 100 μm pitch, readout by low-noise and very fast SiGe HBT frontend electronics. Silicon wafers with 50 µm thick epilayer with a resistivity of 350 Ωcm were used to produce a fully depleted sensor. At the highest frontend power density tested of 2.7 W/cm2, the time resolution with the femtosecond laser pulses was found to be 45 ps for signals generated by 1200 electrons, and 3 ps in the case of 11k electrons, which corresponds approximately to 0.4 and 3.5 times the most probable value of the charge generated by a minimum-ionizing particle. The results were compared with testbeam data taken with the same prototype to evaluate the time jitter produced by the fluctuations of the charge collection.
(42) Radiation Tolerance of SiGe BiCMOS Monolithic Silicon Pixel Detectors without Internal Gain Layer
M. Milanesio, L. Paolozzi, T. Moretti, R. Cardella, T. Kugathasan, F. Martinelli, A. Picardi, I. Semendyaev, S. Zambito, K. Nakamura, Y. Tabuko, M. Togawa, M. Elviretti, H. Rücker, F. Cadoux, R. Cardarelli, S. Débieux, Y. Favre, C.A. Fenoglio, D. Ferrere, S. Gonzalez-Sevilla, L. Iodice, R. Kotitsa, C. Magliocca, M. Nessi, A. Pizarro-Medina, J. Sabater Iglesias, J. Saidi, M. Vicente Barreto Pinto, G. Iacobucci
Journal of Instrumentation 19, P01014 (2024)
DOI: 10.1088/1748-0221/19/01/P01014
A monolithic silicon pixel prototype produced for the MONOLITH ERC Advanced project was irradiated with 70 MeV protons up to a fluence of 1 × 1016 1 MeV neq/cm2. The ASIC contains a matrix of hexagonal pixels with 100 𝜇m pitch, readout by low-noise and very fast SiGe HBT frontend electronics. Wafers with 50 𝜇m thick epilayer with a resistivity of 350 Ωcm were used to produce a fully depleted sensor. Laboratory tests conducted with a 90Sr source show that the detector works satisfactorily after irradiation. The signal-to-noise ratio is not seen to change up to fluence of 6×1014 neq/cm2. The signal time jitter was estimated as the ratio between the voltage noise and the signal slope at threshold. At -35◦C, sensor bias voltage of 200 V and frontend power consumption of 0.9 W/cm2, the time jitter of the most-probable signal amplitude was estimated to be 𝜎𝑡90Sr = 21 ps for proton fluence up to 6 × 1014 neq/cm2 and 57 ps at 1 × 1016 neq/cm2 . Increasing the sensor bias to 250 V and the analog voltage of the preamplifier from 1.8 to 2.0 V provides a time jitter of 40 ps at 1 × 1016 neq/cm2 .
(43) Local Laser-Induced Solid-Phase Recrystallization of Phosphorus-Implanted Si/SiGe Heterostructures for Contacts Below 4.2 K
M. Neul, I.V. Sprave, L.K. Diebel, L.G. Zinkl, F. Fuchs, Y. Yamamoto, C. Vedder, D. Bougeard, L.R. Schreiber ,,*
Physical Review Materials 8(4), 043801 (2024)
DOI: 10.1103/PhysRevMaterials.8.043801
Si/SiGe heterostructures are of high interest for high-mobility transistor and qubit applications, specifically for operations below 4.2K. In order to optimize parameters such as charge mobility, built-in strain, electrostatic disorder, charge noise, and valley splitting, these heterostructures require Ge concentration profiles close to monolayer precision. Ohmic contacts to undoped heterostructures are usually facilitated by a global annealing step activating implanted dopants, but compromising the carefully engineered layer stack due to atom diffusion and strain relaxation in the active device region. We demonstrate a local laser-based annealing process for recrystallization of ion-implanted contacts in SiGe, greatly reducing the thermal load on the active device area. To quickly adapt this process to the constantly evolving heterostructures, we deploy a calibration procedure based exclusively on optical inspection at room temperature. We measure the electron mobility and contact resistance of laser-annealed Hall bars at temperatures below 4.2K and obtain values similar or superior to that of a globally annealed reference sample. This highlights the usefulness of laser-based annealing to take full advantage of high-performance Si/SiGe heterostructures.
(44) Blooming and Pruning: Learning from Mistakes with Memristive Synapses
K. Nikiruy, E. Perez, A. Baroni, K.D.S. Reddy, S. Pechmann, Ch. Wenger, M. Ziegler
Scientific Reports 14, 7802 (2024)
DOI: 10.1038/s41598-024-57660-4, (KI-IoT)
Blooming and pruning is one of the most important developmental mechanisms of the biological brain in the first years of life, enabling it to adapt its network structure to the demands of the environment. The mechanism is thought to be fundamental for the development of cognitive skills. Inspired by this, Chialvo and Bak proposed in 1999 a learning scheme that learns from mistakes by eliminating from the initial surplus of synaptic connections those that lead to an undesirable outcome. Here, this idea is implemented in a neuromorphic circuit scheme using CMOS integrated HfO2-based memristive devices. The implemented two-layer neural network learns in a self-organized manner without positive reinforcement and exploits the inherent variability of the memristive devices. A combined experimental and simulation-based parameter study is presented to find the relevant system and device parameters leading to a compact and robust memristive neuromorphic circuit that can handle association tasks.
(45) Strong Optical Coupling of Lattice Resonances in a Top-Down Fabricated Hybrid Metal−Dielectric Al/Si/Ge Metasurface
P. Oleynik, F. Berkmann, S. Reiter, J. Schlipf, M. Ratzke, Y. Yamamoto, I.A .Fischer
Nano Letters 24(10), 3142 (2024)
DOI: 10.1021/acs.nanolett.3c05050
Optical metasurfaces enable the manipulation of the light–matter interaction in ultrathin layers. Compared with their metal or dielectric counterparts, hybrid metasurfaces resulting from the combination of dielectric and metallic nanostructures can offer increased possibilities for interactions between modes present in the system. Here, we investigate the interaction between lattice resonances in a hybrid metal–dielectric metasurface obtained from a single-step nanofabrication process. Finite-difference time domain simulations show the avoided crossing of the modes appearing in the wavelength-dependent absorptance inside the Ge upon variations in a selected geometry parameter as evidence for strong optical coupling. We find good agreement between the measured and simulated absorptance and reflectance spectra. Our metasurface design can be easily incorporated into a top-down optoelectronic device fabrication process with possible applications ranging from on-chip spectroscopy to sensing.
(46) Optofluidic Biosensors with Si-based Photonic Integrated Circuit Technology
M. Paul, G. Lecci, C. Schumann, A. Mai, P. Steglich
Proc. iCampus Confernce Cottbus (iCCC 2024), 112 (2024)
DOI: 10.5162/iCCC2024/8.3
(47) Repeatability of Automated Edge Coupling for Wafer Level Testing
A. Peczek, T. Minner, Q. Yuan, Ch. Mai, D. Rishavy, L. Zimmermann
Proc. 25th European Conference On Integrated Optics (ECIO 2024), in: Springer Proceedings in Physics, Springer, 402, 71 (2024)
DOI: 10.1007/978-3-031-63378-2_13
In foundries environment the optical characterization of Photonic In-tegrated Circuits (PICs) for process control and device performance verification requires a high throughput test solution. So far, wafer-level characterization of PICs has been limited to the grating couplers as the optical input/output interface. We propose an alternative optical probing technique suitable for automated on-wafer measurements based on edge coupling.
Here, we evaluate a solution based on FormFactor’s CM300-SiPh probe station and the Pharos Probe. A brief overview of the system is given and the repeatabil-ity of the coupling across the wafer is investigated.
(48) Employing Optical Beam-Induced Current Measurement in Side-Channel Analysis
D. Petryk, I. Kabin, J. Bělohoubek, P. Fišer, J. Schmidt, M. Krstic, Z. Dyka
Proc. 36. ITG/GMM/GI-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2024), 15 (2024)
(Total Resilience)
(49) Design and Phase Noise Measurements of an Ultrafast Dual-Modulus Prescaler in 130 nm SiGe:C BiCMOS
L. Polzin, M. van Delden, N. Pohl, H. Rücker, T. Musch
IEEE Transactions on Microwave Theory and Techniques 72(1), 525 (2024)
DOI: 10.1109/TMTT.2023.3329699
The design complexity of high-speed and power-efficient circuits increases to higher operation frequencies. Therefore, this manuscript gives an overview of how to design and optimize fully differential emitter-coupled logic (ECL) gates using two dual-modulus prescalers with switchable division ratios of 4 and 5. The first prescaler is optimized to the highest operation frequencies, up to 142 GHz and even 166 GHz for the division ratios of 5 and 4, respectively. Furthermore, another prescaler has been optimized for the widely used 80 GHz band, which has been heavily promoted by the automotive industry and has a high number of components in that domain. Both prescalers can be utilized in a fully programmable frequency divider with a wide division ratio range. As the measurement of the additive phase noise for frequency-converting devices with excellent noise performance is quite challenging, this is discussed theoretically and carried out practically. The measured jitter is between 500 as and 1.9 fs within integration limits of 100 Hz up to 1 MHz offset frequency.
(50) On-Chip Refractive Index Sensors Based on Plasmonic TiN Nanohole Arrays
S. Reiter, A. Sengül, Ch. Mai, D. Spirito, Ch. Wenger, I.A. Fischer
Proc. IEEE Silicon Photonics Conference (SiPhotonics 2024), TuP10 (2024)
DOI: 10.1109/SiPhotonics60897.2024.10544048, (iCampus II)
(51) Open-Source Software, Fediverse and Custom ROMs as Tools for a Sustainable Internet
S. Rödiger, M. Kögler, M. Birkholz
Proc. Electronics Goes Green Conference (EGG 2024), 655 (2024)
(Bioelectronics)
(52) Selective Epitaxy of Germanium on Silicon for the Fabrication of CMOS Compatible Short-Wavelength Infrared Photodetectors
D. Ryzhak, A.A. Corley-Wiciak, P. Steglich, Y. Yamamoto, J. Frigerio, R. Giani, A. De Iacovo, D. Spirito, G. Capellini
Materials Science in Semiconductor Processing 176, 108308 (2024)
DOI: 10.1016/j.mssp.2024.108308, (VISIR2)
Here we present the selective epitaxial growth of Ge on Si using reduced pressure chemical vapor deposition on SiO2/Si solid masks realized on 200 mm Si wafers, aiming at manufacturing integrated visible/short-wavelength infrared photodetectors. By a suitable choice of the reactants and of the process conditions, we demonstrated highly selective and pattern-independent growth of Ge microstructure featuring high crystalline quality. The Ge “patches” show a distinct faceting, with a flat top (001) facet and low energy facets such as e.g. {113} and {103} at their sidewalls, independently on their size. Interdiffusion of Si in to the Ge microcrystals is limited to an extension of ∼20 nm from the heterointerface. The Ge patches resulted to be plastically relaxed with threading dislocation density values better or on par than those observed in continuous two-dimensional Ge/Si epilayer in the low 107 cm−2 range. A residual tensile strain was observed for patches with size >10 μm, due to elastic thermal strain accumulation, as confirmed by μ-Raman spectroscopy and μ-photoluminescence characterization. Polarization-dependent Raman mapping highlights the strain distribution associated to the tridimensional shape. On this material, Ge photodiodes were fabricated and characterized, showing promising optoelectronic performances.
(53) A Collective Die to Wafer Bonding Approach Based on Surface-Activated Aluminum-Aluminum Thermocompression Bonding
S. Schulze, T. Voß, P. Krüger, M. Wietstruck
IEEE Transactions on Components, Packaging and Manufacturing Technology 14(3), 519 (2024)
DOI: 10.1109/TCPMT.2024.3363236, (GreenICT)
This work presents a collective die to wafer (D2W) bonding concept based on surface-activated aluminum–aluminum (Al–Al) thermocompression bonding, which involves the fabrication of a reusable silicon carrier wafer onto which the dies are placed without additional adhesives. Compared to other methods, the absence of adhesives allows the subsequent processing under ultrahigh vacuum, which is beneficial for low-temperature Al–Al bonding. The Al–Al bonding is performed in an EVG ComBond system, where an argon plasma is used to remove the native oxide. The thermocompression bonding is carried out for 1 h at a temperature of 300 °C with a pressure between 52 and 60 MPa. This article shows an Al–Al collective D2W bonding process with high yield >90%, excellent bond strength >90 MPa, and contact resistances in the milliohms range.
(54) A Collective Die to Wafer Bonding Approach Based on Surface-Activated Aluminum-Aluminum Thermocompression Bonding
S. Schulze, T. Voß, P. Krüger, M. Wietstruck
IEEE Transactions on Components, Packaging and Manufacturing Technology 14(3), 519 (2024)
DOI: 10.1109/TCPMT.2024.3363236, (ESSENCE-6GM)
This work presents a collective die to wafer (D2W) bonding concept based on surface-activated aluminum–aluminum (Al–Al) thermocompression bonding, which involves the fabrication of a reusable silicon carrier wafer onto which the dies are placed without additional adhesives. Compared to other methods, the absence of adhesives allows the subsequent processing under ultrahigh vacuum, which is beneficial for low-temperature Al–Al bonding. The Al–Al bonding is performed in an EVG ComBond system, where an argon plasma is used to remove the native oxide. The thermocompression bonding is carried out for 1 h at a temperature of 300 °C with a pressure between 52 and 60 MPa. This article shows an Al–Al collective D2W bonding process with high yield >90%, excellent bond strength >90 MPa, and contact resistances in the milliohms range.
(55) Determination of the Indirect Bandgap of Lattice-Matched SiGeSn on Ge
D. Schwarz, E. Kasper, F. Bärwolf, I. Costina, M. Oehme
Materials Science in Semiconductor Processing 180, 108565 (2024)
DOI: 10.1016/j.mssp.2024.108565, (SiGeSn NanoFETs)
The first experimental results for the indirect bandgap of SiGeSn, lattice-matched on Ge are reported. The necessary condition for lattice-matching on Ge is a constant ratio of Si/Sn = 3.67. Thus, the investigated composition range is cSn={5.0,7.5,10.0}% and precisely investigated using secondary ion mass spectroscopy. The bandgap determination is based on the extraction of the built-in voltage of a SiGeSn pn++ junction utilizing the so-called capacitance-voltage intercept method. Detailed calculations of the band diagram of the pn++ junction to be investigated, including first level approximations for the effective density of states in the valence and conduction band were performed. The results show that the composition of the alloy strongly influences its bandgap and is ΕLg,SiGeSn={0.588,0.704,0.413}eV, respectively.
(56) Self-Consistent Determination of Interface and Bulk Parameters of Oxide/Si/SiGe/Si Layer Stacks by Means of Simultaneous Measurement of Gate Current and High Frequency Gate Capacitance in Non-Steady State Non-Equilibrium
R. Sorge, W.-C. Wen, M. Lisker, N. Inomata, Y. Yamamoto
Proc. iCampus Cottbus Conference (iCCC 2024), 207 (2024)
DOI: 10.5162/iCCC2024/P28, (SiGeQuant)
(57) Germanium Photodiodes with 3-dB Bandwidths >110 GHz and L-Band Responsivity of >0.7 A/W
D. Steckler, St. Lischke, A. Kroh, A. Peczek, G. Georgieva, L. Zimmermann
IEEE Photonics Technology Letters 36(12), 775 (2024)
DOI: 10.1109/LPT.2024.3398359, (DFG EPIC-Sense 2)
We present germanium p-i-n photodiodes with opto-electrical 3-dB bandwidths >110 GHz while exhibiting high internal responsivity >0.7 AW-1 at 1620 nm wavelength. Compared to our previous work, this is an improvement of >35 % in internal responsivity without sacrificing the photo detectors bandwidths. This was achieved by the introduction of a local reduction of the silicon waveguide thickness right below the germanium body, which improves optical coupling (from the silicon waveguide into the germanium region) and confinement. In this work we study three photodiode device variants in which germanium is laterally sandwiched between complementary in-situ doped Si regions. This approach enables the side-by side realization of germanium p-i-n photodiodes with different widths, featuring different combinations of OE bandwidths and responsivities. We further investigate on the optical-power handling capabilities of these photodiodes by means of responsivity and bandwidth.
(58) Germanium Photodiodes with 3-dB Bandwidths >110 GHz and L-Band Responsivity of >0.7 A/W
D. Steckler, St. Lischke, A. Kroh, A. Peczek, G. Georgieva, L. Zimmermann
IEEE Photonics Technology Letters 36(12), 775 (2024)
DOI: 10.1109/LPT.2024.3398359, (DFG ULTRA 2)
We present germanium p-i-n photodiodes with opto-electrical 3-dB bandwidths >110 GHz while exhibiting high internal responsivity >0.7 AW-1 at 1620 nm wavelength. Compared to our previous work, this is an improvement of >35 % in internal responsivity without sacrificing the photo detectors bandwidths. This was achieved by the introduction of a local reduction of the silicon waveguide thickness right below the germanium body, which improves optical coupling (from the silicon waveguide into the germanium region) and confinement. In this work we study three photodiode device variants in which germanium is laterally sandwiched between complementary in-situ doped Si regions. This approach enables the side-by side realization of germanium p-i-n photodiodes with different widths, featuring different combinations of OE bandwidths and responsivities. We further investigate on the optical-power handling capabilities of these photodiodes by means of responsivity and bandwidth.
(59) Monolithic Integration of 80-GHz Ge Photodetectors and 100-GHz Ge Electro-Absorption Modulators in a Photonic BiCMOS Technology
D. Steckler, St. Lischke, A. Peczek, A. Kroh, J. Beyer, L. Zimmermann
IEEE Transactions on Electron Devices 71(5), 3417 (2024)
DOI: 10.1109/TED.2024.3370128, (DFG EPIC-Sense 2)
We demonstrate a photonic BiCMOS technology featuring waveguide (WG)-coupled germanium electro-absorption modulators (EAMs) and photodetectors with respective 3-dB bandwidths of 100 and 80 GHz, monolithically integrated with high-performance SiGe-heterojunction bipolar transistors (HBTs) and 0.25- μ m CMOS. The EAMs feature dynamic extinction ratios of 2.3 dB at a symbol rate of 112 GBaud at 1.8 V pp and λ = 1590 nm. We demonstrate that there is no degradation of the baseline technology “SG25H5EPIC” in terms of electronic device yield or performance.
(60) Ge-fin Photodiodes with 3-dB Bandwidths Well Beyond 110 GHz for O-Band Receiver Subsystems
D. Steckler, St. Lischke, A. Peczek, L. Zimmermann
Proc. 25th European Conference on Integrated Optics (ECIO 2024), in: Springer Proceedings in Physics, Springer, 402, 58 (2024)
DOI: 10.1007/978-3-031-63378-2_11, (DFG EPIC-Sense 2)
(61) Ge-fin Photodiodes with 3-dB Bandwidths Well Beyond 110 GHz for O-Band Receiver Subsystems
D. Steckler, St. Lischke, A. Peczek, L. Zimmermann
Proc. 25th European Conference on Integrated Optics (ECIO 2024), in: Springer Proceedings in Physics, Springer, 402, 58 (2024)
DOI: 10.1007/978-3-031-63378-2_11, (DFG ULTRA 2)
(62) Ge-fin Photodiodes with 3-dB Bandwidths Well Beyond 110 GHz for O-Band Receiver Subsystems
D. Steckler, St. Lischke, A. Peczek, L. Zimmermann
Proc. 25th European Conference on Integrated Optics (ECIO 2024), in: Springer Proceedings in Physics, Springer, 402, 58 (2024)
DOI: 10.1007/978-3-031-63378-2_11, (CBQD)
(63) On the Dynamic and Static Extinction Ratio of Germanium Electro-Absorption Modulators
D. Steckler, St. Lischke, A. Peczek, L. Zimmermann
Proc. IEEE Silicon Photonics Conference (SiPhotonics 2024), WP2 (2024)
DOI: 10.1109/SiPhotonics60897.2024.10543654, (DFG EPIC-Sense 2)
(64) Design, Fabrication, and Characterization of Integrated Optical Through-Silicon Waveguides for 3D Photonic Interconnections
F. Villasmunta, P. Steglich, C. Villringer, S. Schrader, H. Schenk, A. Mai, M. Regehly
Proc. 24th SPIE Optical Interconnects (OPTO 2024), 12892, 128920I (2024)
DOI: 10.1117/12.3003146
(65) Characterization, Analysis, and Modeling of Long-Term RF Reliability and Degradation of SiGe HBTs for High Power Density Applications
C. Weimer, G.G. Fischer, M. Schröter
IEEE Transactions on Device and Materials Reliability 24(1), 20 (2024)
DOI: 10.1109/TDMR.2023.3343503, (SIGEREL)
This paper aims at determining RF operating limits of SiGe HBTs. Long-term stress tests consisting of RF large-signal stress and periodic measurements of small-signal parameters are performed. Reliable dynamic large-signal transistor operation is demonstrated beyond conventional static safe operating limits. In addition, RF operating limits are identified and degradation of SiGe HBTs accelerated by extreme RF stress is systematically characterized, analyzed and modeled. RF-stress-caused degradation is shown to significantly affect the collector current and demonstrated to be different from electrothermal breakdown caused by DC stress. A modeling approach for estimating SiGe HBT degradation under RF large-signal operating conditions is proposed and shown to agree very well with experimental data.
(66) High Frequency Properties of an Integrated PJFET for Sensor Applications
Ch. Wipf, R. Sorge
Proc. iCampus Cottbus Conference (iCCC 2024), 216 (2024)
DOI: 10.5162/iCCC2024/P30
(67) Thin and Locally Dislocation-Free SiGe Virtual Substrate Fabrication by Lateral Selective Growth
Y. Yamamoto, W.-C. Wen, M.A. Schubert, A.A. Corley-Wiciak, S. Sugawa, Y. Ito, R. Yokogawa, H. Han, R. Loo, A. Ogura, B. Tillack
Japanese Journal of Applied Physics 63(2), 02SP53 (2024)
DOI: 10.35848/1347-4065/ad189d
Locally dislocation-free SiGe-on-insulator (SGOI) is fabricated by chemical vapor deposition. Lateral selective SiGe growth of ~30%, ~45% and ~55% is performed around ~1 µm square Si(001) pillar located under the center of a 6.3 µm square SiO2 on Si-on-insulator substrate which is formed by H2-HCl vapor phase etching. The selective SiGe is deposited by H2-SiH2Cl2-GeH4-HCl. In the deposited SiGe layer, tensile strain is observed by top-view. The degree of strain is slightly increased at the corner of the SiGe. The tensile strain is caused by the partial compressive strain of SiGe in lateral direction and thermal expansion difference between Si and SiGe. Slightly higher Ge incorporation is observed in higher tensile strain region. At the peaks formed between the facets of growth front, Ge incorporation is reduced. These phenomena are pronounced for SiGe with higher Ge contents. Dislocation-free SGOI is formed along <010> from the Si pillar by lateral aspect-ratio-trapping.
E.M. Al Seragi, Y.L. Rajendra, W. Ahmad, M. Kaynak, P.F. Goldsmith, S. Zeinoladedinzadeh
IEEE Transactions on Terahertz Science and Technology 14(2), 162 (2024)
DOI: 10.1109/TTHZ.2024.3349483
This work presents a novel terahertz THz sideband separating receiver (SSR) implemented in silicon germanium (SiGe) 0.13 μm BiCMOS technology that covers a broad frequency range of 220-320 GHz. The proposed architecture provides simultaneous observation of spectral lines with high image rejection ratio (IRR) across the entire operating frequency range. The double down conversion architecture with a first mixer operating as a sub-harmonic mixer was configurated as a sideband separating receiver leveraging the Weaver topology to provide two differential channels, one for the upper sideband (USB) and one for the lower sideband (LSB). The presented design demonstrates an IRR exceeding 20 dB across the entire frequency range of 220-320 GHz, without the need for calibration. To the best of the author's knowledge, this is the first reported H-band simultaneous sideband separation receiver in silicon technology. The fabricated receiver measures 1.2×1 mm2 and consumes 19 mW (not including LO power consumption), showcasing its potential for application in multiple-pixel arrays for space-borne observations.
(2) Adhesive-Free Bonding for Hetero-Integration of InP based Coupons Micro-Transfer Printed on SiO2 into Complementary Metal-Oxide-Semiconductor Backend for Si Photonics Application on 8” Wafer Platform
K. Anand, P. Steglich, J. Kreissl, C.A. Chavarin, D. Spirito, M. Franck, G. Lecci, I. Costina, N. Herfurth, J. Katzer, Ch. Mai, A. Becker, J.P. Reithmaier, L. Zimmermann, A. Mai
Thin Solid Films 799, 140399 (2024)
DOI: 10.1016/j.tsf.2024.140399, (FMD)
Micro-Transfer printing (µTP) is a promising technique for hetero-integration of III-V materials into Si-based photonic platforms. To enhance the print yield by increasing the adhesion between the III-V material and Si or SiO2 surface, an adhesion promoter like Benzocyclobutene is typically used as interlayer. In this work, we demonstrate µTP of InP based coupons on SiO2 interlayer without any adhesive interlayer and investigate the mechanism of adhesive free bonding. Source coupons are InP-based coupon stacks on a sacrificial layer that is removed by a chemical wet etch with FeCl3. For the target we fabricated amorphous-Si waveguides on 8" wafer encapsulated by a High Density Plasma SiO2 which was planarized by a chemical mechanical polishing procedure. We used O2 plasma to activate both source and target to increase adhesion between coupon and substrate. To get a better understanding of the bonding mechanism we applied several surface characterization methods. Root mean square roughness of InP and SiO2 was measured by atomic force microscopy before and after plasma activation. The step height of the micro-transfer printed source coupon on the target wafer is estimated by optical step profiler. We used Raman peak position mappings of InP to analyze possible strain and contact angle measurements on SiO2, before and after plasma activation to observe a change in the hydrophilicity of the surface. X-ray Photoelectron Spectroscopy analysis was used to characterize the surface energy states of P2p, In3d, O1s for InP source and Si2p, O1s for SiO2 target. Our results demonstrate direct bonding of InP coupons by means of µTP without the need of a strain-compensation layer. In this way, a promising route towards Complementary Metal-Oxide-Semiconductor compatible use of µTP for the hetero-integration of InP is provided.
(3) Adhesive-Free Bonding for Hetero-Integration of InP based Coupons Micro-Transfer Printed on SiO2 into Complementary Metal-Oxide-Semiconductor Backend for Si Photonics Application on 8” Wafer Platform
K. Anand, P. Steglich, J. Kreissl, C.A. Chavarin, D. Spirito, M. Franck, G. Lecci, I. Costina, N. Herfurth, J. Katzer, Ch. Mai, A. Becker, J.P. Reithmaier, L. Zimmermann, A. Mai
Thin Solid Films 799, 140399 (2024)
DOI: 10.1016/j.tsf.2024.140399, (PEARLS)
Micro-Transfer printing (µTP) is a promising technique for hetero-integration of III-V materials into Si-based photonic platforms. To enhance the print yield by increasing the adhesion between the III-V material and Si or SiO2 surface, an adhesion promoter like Benzocyclobutene is typically used as interlayer. In this work, we demonstrate µTP of InP based coupons on SiO2 interlayer without any adhesive interlayer and investigate the mechanism of adhesive free bonding. Source coupons are InP-based coupon stacks on a sacrificial layer that is removed by a chemical wet etch with FeCl3. For the target we fabricated amorphous-Si waveguides on 8" wafer encapsulated by a High Density Plasma SiO2 which was planarized by a chemical mechanical polishing procedure. We used O2 plasma to activate both source and target to increase adhesion between coupon and substrate. To get a better understanding of the bonding mechanism we applied several surface characterization methods. Root mean square roughness of InP and SiO2 was measured by atomic force microscopy before and after plasma activation. The step height of the micro-transfer printed source coupon on the target wafer is estimated by optical step profiler. We used Raman peak position mappings of InP to analyze possible strain and contact angle measurements on SiO2, before and after plasma activation to observe a change in the hydrophilicity of the surface. X-ray Photoelectron Spectroscopy analysis was used to characterize the surface energy states of P2p, In3d, O1s for InP source and Si2p, O1s for SiO2 target. Our results demonstrate direct bonding of InP coupons by means of µTP without the need of a strain-compensation layer. In this way, a promising route towards Complementary Metal-Oxide-Semiconductor compatible use of µTP for the hetero-integration of InP is provided.
(4) Leveraging Lookup Tables for Efficient LDO Design Exploration using Open-Source CAD Tools and IHP-Open130-G2 PDK
D. Arevalos, J. Marin, C. Rojas, K. Herman
31st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2024), abstr. book 53 (2024)
(5) A Highly Efficient 240-GHz Power Amplifier in 0.13-μm SiGe
K. Balaban, M. Kaynak, A.C. Ulusoy
IEEE Microwave and Wireless Technology Letters (MWTL) 34(1), 88 (2024)
DOI: 10.1109/LMWT.2023.3328934
This letter presents the design and experimental characterization of a highly efficient WR3.4-band power amplifier (PA) using 0.13-μm SiGe technology. The realized differential cascode PA demonstrates a high efficiency, owing to the gm-boosting technique which enables a relatively higher small-signal gain per stage. The proposed PA exhibits a saturated output power of 10.48 dBm with a maximum power-added-efficiency (PAE) of 5.46% at 240 GHz , which is a leading-edge performance among the reported silicon (Si)-based WR3.4-band PAs. The small-signal gain peaks at 24.1 dB and the PA has a 3-dB bandwidth of 21 GHz.
(6) Design and Investigation of 2x2 Dielectric Resonator Antennas Array for sub-THz Applications
M.F. Bashir, M. Wietstruck
18th European Conference on Antennas and Propagation (EuCAP 2024), (2024)
DOI: 10.23919/EuCAP60739.2024.10501657
(7) Design of 240 GHz Dielectric Resonator Antenna in 130 nm SiGe BiCMOS Process
M.F. Bashir, M. Wietstruck
15th German Microwave Conference (GeMIC 2024), 73 (2024)
DOI: 10.23919/GeMiC59120.2024.10485246
(8) Sub-THz Substrate Integrated Waveguide Signal Transitions in Backend-of-Line of a Silicon Process
A. Bhutani, M. Kaynak, M. Wietstruck, E. Bekker, I.K. Aksoyak, J. Hebeler, T. Zwick
Proc. 18th European Conference on Antennas and Propagation (EuCAP 2024), (2024)
DOI: 10.23919/EuCAP60739.2024.10501393
(9) Innovations in Electronics – Friend or Foe in Achieving Sustainability?
M. Birkholz
Proc. Electronics Goes Green Conference (EGG 2024), 231 (2024)
(Bioelectronics)
(10) The Chip-Level in-Plane Stress Distribution over BiCMOS Wafers
Z. Cao, T. Voss, M. Wietstruck, C. Carta, M. Kaynak
Proc. 24th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2024), 45 (2024)
DOI: 10.1109/SiRF59913.2024.10438504, (FLEXCOM)
(11) Optimization of the Metal Deposition Process for the Accurate Estimation of Low Metal-Graphene Contact-Resistance
D. Capista, R. Lukose, F. Majnoon, M. Lisker, Ch. Wenger, M. Lukosius
Proc. 47th International ICT and Electronics Convention (MIPRO 2024), 1561 (2024)
DOI: 10.1109/MIPRO60963.2024.10569895, (2D-EPL)
(12) A 300 GHz x9 Multiplier Chain with 9.6 dBm Output Power in 0.13-μm SiGe Technology
A. Chandra-Prabhu, J. Grzyb, P. Hillger, T. Bücher, H. Rücker, U. Pfeiffer
Proc. 24th IEEE Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF 2024), 37 (2024)
DOI: 10.1109/SiRF59913.2024.10438581, (DFG-Dotseven2IC)
(13) A 240-GHz VMPS with 1.2° and 0.35 dB RMS Errors in 130 nm BiCMOS:C Technology
M.H. Eissa, Ch. Wipf, A. Malignaggi, G. Kahmen
IEEE Microwave and Wireless Technology Letters (MWTL) 34(3), 295 (2024)
DOI: 10.1109/LMWT.2024.3357203
This work presents a low phase error (PE) and amplitude error (AE) vector modulator phase shifter (VMPS) in the J -band. The influence of the IQ crosstalk RF impairment on the performance is analyzed for different vector summation implementations, guiding to the VMPS architecture choice and design optimization. The chosen architecture consists of an IQ analog-controlled voltage-gain amplifier (IQ-VGA), Branchline coupler, and a Wilkinson combiner. Test structures for the variable-gain amplifier (VGA) and the VMPS are manufactured and measured in a 130-nm BiCMOS technology (fT / fmax = 300/500 GHz). For the phase resolution of 11.25°, the VMPS achieves an average rms PE and AE of 1.2° and 0.35 dB, respectively, with equivalent to 5.5 -bits control voltage across the frequency band 220–260 GHz. The VMPS consumes 60 mW from 2.5-V supply and occupies 0.2 mm 2 of silicon area. This work presents the least PE and AE across a wide bandwidth for VMPS in silicon technologies above 200 GHz, which is crucial for large-scale beam-steering arrays.
(14) Epitaxial Growth of Nd2O3 Layers on Virtual SiGe Substrates on Si(111)
H. Genath, M.A. Schubert, H. Yamtomo, J. Krügener, H.J. Osten
Journal of Applied Physics 135(11), 115302 (2024)
DOI: 10.1063/5.0191350
This study explores the growth and structural characteristics of Nd2O3 layers on virtual germanium-rich SiGe substrates on Si(111). We focus on the emergence of the hexagonal phase depending on the stoichiometry of the virtual substrate. X-ray diffraction measurements reveal a hexagonal phase when Nd2O3 is grown directly on Si(111), while growth on Ge leads to a cubic oxide structure. On SiGe layers, the growth of the oxide results in a mixed phase containing hexagonal and cubic regions, regardless of the Ge content. The cubic structure grown on virtual Ge substrates exhibits strong tensile strain, while layers grown on SiGe layers show no strain. In situ growth control via electron diffraction shows a dependence of the oxide structure of the surface reconstruction of the virtual substrate. Growth on a 7×7 reconstruction leads to hexagonal parts on Si-based substrates, while growth on c(2×8) results in cubic oxide growth on Ge. Furthermore, oxide layers grown on virtual SiGe substrates form an interfacial silicate layer. The thickness of the interfacial layer is influenced by the Si content and the structure of the oxide layer enabling oxygen diffusion pathways.
(15) Improving Epitaxial Growth of γ-Al2O3 Films via Sc2O3/Y2O3 Oxide Buffers
S. Gougam, M.A. Schubert, D. Stolarek, S.B. Thapa, M.H. Zoellner
Advanced Materials Interfaces 221(12), 2400228 (2024)
DOI: 10.1002/pssa.202400228, (GaN HEMT support)
Heteroepitaxial growth of γ-Al2O3 on Sc2O3/Y2O3/Si (111) is achieved with oxygen plasma-assisted molecular beam epitaxy in order to prevent polycrystalline grain boundary formation caused by lattice mismatch. Substrate temperature as well as oxygen flow are adjusted to optimize epitaxial growth conditions around 715–760 °C and 1.9 sccm, respectively. Epitaxial growth is monitored in situ by reflection high-energy diffraction, while surface morphology is studied by scanning electron microscopy ex-situ. X-ray diffraction indicates epitaxial out-of-plane 111 orientation with oxygen flow above 0.6 sccm. However, transmission electron microscopy shows stacking fault formation for high oxygen flows. Finally, nanobeam electron diffraction confirms Smrčok model of a spinel-like γ-Al2O3 crystal structure.
(16) FOSS CAD for the Compact Verilog-A Model Standardization in Open Access PDKs
W. Grabinski, R. Scholz, J. Verley, E.R. Keiter, H. Vogt, D. Warning, P. Nenzi, F. Lannutti, F. Salfelder, A. Davis, M. Brinson, B. Virdee, G. Torri, D. Tomaszewski, M. Bucher, J.-M. Sallese, M. Müller, P. Kuthe, M. Krattenmacher
Proc. 8th IEEE Electron Devices Technology and Manufacturing (EDTM 2024), (2024)
DOI: 10.1109/EDTM58488.2024.10511990, (FMD-QNC)
(17) An On-Chip Antenna-Coupled Preamplified D-Band to J-Band Total Power Radiometer Chip in 130 nm SiGe BiCMOS Technology
J. Grzyb, M. Andree, H. Rücker, U.R. Pfeiffer
Proc. IEEE Radio Frequency Integrated Circuits Symposium (RFIC 2024), 359 (2024)
DOI: 10.1109/RFIC61187.2024.10599964
(18) Evaluating an Open-Source Hardware Approach from HDL to GDS for a Security Chip Design – A Review of the Final Stage of Project HEP
T. Henkes, S. Reith, M. Stöttinger, N. Herfurth, G. Panic, J. Wälde, F. Buschkowski, P. Sasdrich, C. Lüth, M. Funck, T. Kiyan, A. Weber, D. Boeck, R. Rathfelder, T. Grawunder
Proc. 27th Design, Automation and Test in Europe (DATE 2024), (2024)
(VE-HEP)
(19) Design and Simulation of Si-Photonic Nanowire-Waveguides with DEP Concentration Electrodes for Biosensing Applications
A. Henriksson, P. Neubauer, M. Birkholz
zu finden unter: https://arxiv.org/abs/2406.19534
(Bioelectronics)
(20) Półprzewodnikowa Rewolucja w Domenie Open Source
K. Herman, A. Sojka-Piotrowska
Elektronika Praktyczna 5, 2024
(FMD-QNC)
The keyword "open source" is associated by most people primarily with software developed by IT enthusiasts and made available for free to the worldwide community of users. No less interesting is the group of open hardware solutions so called open source hardware. A few people know that there are already free software packages designed to design integrated circuits, including even ASICs with bandwidths of hundreds of GHz. Even more surprising may be the fact that semiconductor factories are also opening their doors to small businesses, academic partners and even.... private customers!
(21) Reflections on the First European Open Source PDK by IHP – Experiences After One Year and Future Activities
K. Herman, R. Scholz, S. Andreev
Proc. 31st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES 2024), abstr. book 19 (2024)
(22) On the Versatility of the IHP BiCMOS Open Source and Manufacturable PDK: A Step Towards the Future where Anybody can Design and Build a Chip
K. Herman, N. Herfurth, T. Henkes, S. Andreev, R. Scholz, M. Müller, M. Krattenmacher, H. Pretl, W. Grabinski
IEEE Solid-State Circuits Magazine 16(2), 30 (2024)
DOI: 10.1109/MSSC.2024.3372907, (FMD-QNC)
In this article, we introduce the first European opensource process design kit, namely IHP-Open130-G2. We provide a concise history of the PDK itself and offer a brief comparison with some alternative open-source PDKs, such as SKY130 and GF180. The article also includes a process description and details on deliverables, offering insights into available devices, models, supported open-source tools, and workflows. As the IHPOpen130-G2 is currently under development, we present key points outlining future activities. This aims to inform and attract users to join the open-source silicon community. The concluding section of the article compares measurement results for active devices with compact model results. The article concludes with a cryptographic IP core based on IHP-Open130-G2 as an exemplary use case.
(23) Strain and Optical Characteristics Analyses of 3-Dimentional Self-Ordered Multilayered SiGe Nanodots by Photoluminescence and Raman Spectroscopy
Y. Ito, R. Yokogawa, W.-C. Wen, Y. Yamamoto, T. Minowa, A. Ogura
Japanese Journal of Applied Physics 63(3), 035SP61 (2024)
DOI: 10.35848/1347-4065/ad231e
The strain state, optical properties, and band structure of the self-ordered multilayered silicon-germanium (SiGe) nanodots, which are staggered and dot-on-dot alignment and embedded by Si spacer, were evaluated by Raman spectroscopy and low-temperature Photoluminescence (PL). These results suggest that the compressive strain applied to the staggered nanodots is smaller than that of the dot-on-dot nanodots, which contributes to the shrinking of the bandgap of the staggered nanodots. Strong PL intensity was observed from the nanodots compared to the single crystalline bulk SiGe due to the carrier confinement and high crystal quality of the nanodots. The stack-controlled nanodots showed a redshift of the PL peaks compared to the bulk SiGe and the effect of strain induced in SiGe nanodots might not be enough to explain this phenomenon. The cause of the redshift was clarified by considering the hetero band structure of the nanodots and the tensile strained spacer.
(24) Complex Electro-Optic Frequency-Response Characterization of a Si Ring Modulator
Y. Jo, Y Ji, H.-K. Kim, St. Lischke, Ch. Mai, L. Zimmermann, W.-Y. Choi
Proc. IEEE Silicon Photonics Conference (SiPhotonics 2024), WA4 (2024)
DOI: 10.1109/SiPhotonics60897.2024.10544200, (MPW_ePIC)
(25) Integration Concept of Plasmonic TiN Nanohole Arrays in a 200 mm BiCMOS Si Technology for Refractive Index Sensor Applications
J. Jose, Ch. Mai, S. Reiter, Ch. Wenger, I.A. Fischer
Proc. iCampus Cottbus Conference (iCCC 2024), 96 (2024)
DOI: 10.5162/iCCC2024/7.2, (iCampus)
(26) A 4-λ × 28-Gb/s/λ Silicon Ring-Resonator-based WDM Receiver with a Reconfigurable Temperature Controller
H.-K. Kim, J.-H. Lee, M. Kim, Y. Jo, St. Lischke, Ch. Mai, L. Zimmermann, W.-Y. Choi
IEEE Journal of Lightwave Technology 42(7), 2296 (2024)
DOI: 10.1109/JLT.2023.3337820
We present a 4-λ × 28-Gb/s/λ silicon ring-resonator-based hybrid-integrated WDM receiver along with the reconfigurable temperature controller. Each of four ring resonators is thermally controlled so that only the target wavelength can be delivered to an integrated photodetector and processed with a hybrid-integrated CMOS TIA. The controller automatically determines the heater voltage required for each ring resonator to receive any target wavelength and maintains this condition against any external temperature fluctuations. It is experimentally verified that the controller performs its task during the initial calibration process and against the thermal stress. In addition, using the controller, WDM channel reconfiguration is successfully demonstrated.
(27) Total-Ionizing-Dose Radiation Hardness of PJFETs Integrated in a 130nm SiGe BiCMOS Technology
F. Korndörfer, J. Schmidt, R. Sorge
Proc. iCampus Cottbus Conference (iCCC 2024), 199 (2024)
DOI: 10.5162/iCCC2024/P26
(28) Rational Design and Development of Room Temperature Hydrogen Sensors Compatible with CMOS Technology: A Necessary Step for the Coming Renewable Hydrogen Economy
J. Kosto, R. Tschammer, C. Morales, K. Henkel, C.A. Chavarin, I. Costina, M. Ratzke, Ch. Wenger, I.A. Fischer, J.I. Flege
Proc. iCampus Confernce Cottbus (iCCC 2024), 182 (2024)
DOI: 10.5162/iCCC2024/P21
(29) Technical and Societal Requirements for Handling of Personal Data on Wearable Devices
M. Kögler, J. Hooyberghs, M. Birkholz
Electronics Goes Green Conference (EGG 2024), 726 (2024)
(Bioelectronics)
(30) A 112-Gb/s Hybrid-Integrated Si Photonic WDM Receiver with Ring-Resonator Filters
J-H. Lee, H.-K. Kim, M. Kim, Y. Jo, St. Lischke, Ch. Mai, L. Zimmermann, W.-Y. Choi
Proc. IEEE Silicon Photonics Conference (SiPhotonics 2024), TuP14 (2024)
DOI: 10.1109/SiPhotonics60897.2024.10543480, (MPW_ePIC)
(31) Ultra-Fast Ge-on-Si Photodetectors
St. Lischke, D. Steckler, A. Peczek, J. Morgan, A. Beling, L. Zimmermann
Proc. Optical Fiber Communications Conference and Exposition (OFC 2024), Tu3D.1 (2024)
(PEARLS)
(32) Ultra-Fast Ge-on-Si Photodetectors
St. Lischke, D. Steckler, A. Peczek, J. Morgan, A. Beling, L. Zimmermann
Proc. Optical Fiber Communications Conference and Exposition (OFC 2024), Tu3D.1 (2024)
(CBQD)
(33) Ultra-Fast Ge-on-Si Photodetectors
St. Lischke, D. Steckler, A. Peczek, J. Morgan, A. Beling, L. Zimmermann
Proc. Optical Fiber Communications Conference and Exposition (OFC 2024), Tu3D.1 (2024)
(DFG EPIC-Sense 2)
(34) Ultra-Fast Ge-on-Si Photodetectors
St. Lischke, D. Steckler, A. Peczek, J. Morgan, A. Beling, L. Zimmermann
Proc. Optical Fiber Communications Conference and Exposition (OFC 2024), Tu3D.1 (2024)
(DFG EPIDAC)
(35) Ultra-Fast Ge-on-Si Photodetectors
St. Lischke, D. Steckler, A. Peczek, J. Morgan, A. Beling, L. Zimmermann
Proc. Optical Fiber Communications Conference and Exposition (OFC 2024), Tu3D.1 (2024)
(plaCMOS)
(36) Alternative Fabrication Method for Ge-Fin Photodiodes with 3-dB Bandwidths Exceeding 110 GHz
St. Lischke, J. Jose, D. Steckler, A. Kroh, A. Peczek, L. Zimmermann
Proc. IEEE Silicon Photonics Conference (SiPhotonics 2024), MBH6 (2024)
DOI: 10.1109/SiPhotonics60897.2024.10543707, (DFG EPIC-Sense 2)
(37) Alternative Fabrication Method for Ge-Fin Photodiodes with 3-dB Bandwidths Exceeding 110 GHz
St. Lischke, J. Jose, D. Steckler, A. Kroh, A. Peczek, L. Zimmermann
Proc. IEEE Silicon Photonics Conference (SiPhotonics 2024), MBH6 (2024)
DOI: 10.1109/SiPhotonics60897.2024.10543707, (CBQD)
(38) Graphene for Photonic Applications
M. Lukosius, R. Lukose, P.K. Dubey, A.I. Raju, M. Lisker, A. Mai, Ch. Wenger
Proc. 47th International ICT and Electronics Convention (MIPRO 2024), 1614 (2024)
DOI: 10.1109/MIPRO60963.2024.10569652, (2D-EPL)
(39) Electron Emission from Alignment-Controlled Multiple Stacks of SiGe Nanodots Embedded in Si Structures
K. Makihara, Y. Yamamoto, H. Yagi, L. Li, N. Taoka, B. Tillack, S. Miyazaki
Materials Science in Semiconductor Processing 174, 108227 (2024)
DOI: 10.1016/j.mssp.2024.108227
We fabricated a vertically aligned and staggered structure comprising 20–stacking layers of SiGe–nanodots (NDs) embedded in Si via reduced–pressure chemical vapor deposition and investigated their electron emission properties. The SiGe–NDs with a 35% Ge content were deposited using SiH4–GeH4, while Si spacers were deposited using SiH4 or SiH2Cl2 to control a 3D–alignment of staggered or dot–on–dot structure, respectively. Top Au electrodes with 5–nm–thick SiO2 and bottom Al contact were fabricated for electron emission measurements. After applying a bias of −3.8 V to the bottom Al–electrode with respect to the grounded top Au–electrode, electron emission was observed from the staggered SiGe–ND stack, which was slightly lower than that of the vertically–aligned NDs. In addition, we also observed a reduction in sample current with the formation of the staggered SiGe–ND stack. These results indicate that aligning SiGe–NDs in a staggered configuration suppresses leakage current and improves electron emission efficiency.
(40) Influence of Stop and Gate Voltage on Resistive Switching of 1T1R HfO2-based Memristors, a Modeling and Variability Analysis
D. Maldonado, A. Cantudo, K.D.S. Reddy, S. Pechmann, M. Uhlmann, Ch. Wenger, J.B. Roldán, E. Pérez
Materials Science in Semiconductor Processing 182, 108726 (2024)
DOI: 10.1016/j.mssp.2024.108726, (KI-IoT)
Memristive devices, particularly resistive random access memory (RRAM) cells based on hafnium oxide (HfO₂) dielectrics, exhibit promising characteristics for a wide range of applications. In spite of their potential, issues related to intrinsic variability and the need for precise simulation tools and modeling methods remain a medium-term hurdle. This study addresses these challenges by investigating the resistive switching (RS) behavior of different 1T1R HfO₂-based memristors under various experimental conditions. Through a comprehensive experimental analysis, we extract RS parameters using different numerical techniques to understand the cycle-to-cycle (C2C) and device-to-device (D2D) variability. Additionally, we employ advanced simulation methodologies, including circuit breaker-based 3D simulation, to shed light on our experimental findings and provide a theoretical framework to disentangle the switching phenomena. Our results offer valuable insights into the RS mechanisms and variability, contributing to the improvement of robust parameter extraction methods, which are essential for the industrial application of memristive devices.
(41) Time Resolution of a SiGe BiCMOS Monolithic Silicon Pixel Detector without Internal Gain Layer with a Femtosecond Laser
M. Milanesio, L. Paolozzi, T. Moretti, A. Latshaw, L. Bonacina, R. Cardella, T. Kugathasan, A. Picardi, M. Elviretti, H. Rücker, R. Cardarelli, L. Cecconi, C. A. Fenoglio, D. Ferrere, S. Gonzalez-Sevilla, L. Iodice, R. Kotitsa, C. Magliocca, M. Nessi, A. Pizarro-Medina, J. Sabater Iglesias, I. Semendyaev, J. Saidi, M. Vicente Barreto Pinto, S. Zambito, G. Iacobucci
Journal of Instrumentation 19, P04029 (2024)
DOI: 10.1088/1748-0221/19/04/P04029
The time resolution of the second monolithic silicon pixel prototype produced for the MONOLITH H2020 ERC Advanced project was studied using a femtosecond laser. The ASIC contains a matrix of hexagonal pixels with 100 μm pitch, readout by low-noise and very fast SiGe HBT frontend electronics. Silicon wafers with 50 µm thick epilayer with a resistivity of 350 Ωcm were used to produce a fully depleted sensor. At the highest frontend power density tested of 2.7 W/cm2, the time resolution with the femtosecond laser pulses was found to be 45 ps for signals generated by 1200 electrons, and 3 ps in the case of 11k electrons, which corresponds approximately to 0.4 and 3.5 times the most probable value of the charge generated by a minimum-ionizing particle. The results were compared with testbeam data taken with the same prototype to evaluate the time jitter produced by the fluctuations of the charge collection.
(42) Radiation Tolerance of SiGe BiCMOS Monolithic Silicon Pixel Detectors without Internal Gain Layer
M. Milanesio, L. Paolozzi, T. Moretti, R. Cardella, T. Kugathasan, F. Martinelli, A. Picardi, I. Semendyaev, S. Zambito, K. Nakamura, Y. Tabuko, M. Togawa, M. Elviretti, H. Rücker, F. Cadoux, R. Cardarelli, S. Débieux, Y. Favre, C.A. Fenoglio, D. Ferrere, S. Gonzalez-Sevilla, L. Iodice, R. Kotitsa, C. Magliocca, M. Nessi, A. Pizarro-Medina, J. Sabater Iglesias, J. Saidi, M. Vicente Barreto Pinto, G. Iacobucci
Journal of Instrumentation 19, P01014 (2024)
DOI: 10.1088/1748-0221/19/01/P01014
A monolithic silicon pixel prototype produced for the MONOLITH ERC Advanced project was irradiated with 70 MeV protons up to a fluence of 1 × 1016 1 MeV neq/cm2. The ASIC contains a matrix of hexagonal pixels with 100 𝜇m pitch, readout by low-noise and very fast SiGe HBT frontend electronics. Wafers with 50 𝜇m thick epilayer with a resistivity of 350 Ωcm were used to produce a fully depleted sensor. Laboratory tests conducted with a 90Sr source show that the detector works satisfactorily after irradiation. The signal-to-noise ratio is not seen to change up to fluence of 6×1014 neq/cm2. The signal time jitter was estimated as the ratio between the voltage noise and the signal slope at threshold. At -35◦C, sensor bias voltage of 200 V and frontend power consumption of 0.9 W/cm2, the time jitter of the most-probable signal amplitude was estimated to be 𝜎𝑡90Sr = 21 ps for proton fluence up to 6 × 1014 neq/cm2 and 57 ps at 1 × 1016 neq/cm2 . Increasing the sensor bias to 250 V and the analog voltage of the preamplifier from 1.8 to 2.0 V provides a time jitter of 40 ps at 1 × 1016 neq/cm2 .
(43) Local Laser-Induced Solid-Phase Recrystallization of Phosphorus-Implanted Si/SiGe Heterostructures for Contacts Below 4.2 K
M. Neul, I.V. Sprave, L.K. Diebel, L.G. Zinkl, F. Fuchs, Y. Yamamoto, C. Vedder, D. Bougeard, L.R. Schreiber ,,*
Physical Review Materials 8(4), 043801 (2024)
DOI: 10.1103/PhysRevMaterials.8.043801
Si/SiGe heterostructures are of high interest for high-mobility transistor and qubit applications, specifically for operations below 4.2K. In order to optimize parameters such as charge mobility, built-in strain, electrostatic disorder, charge noise, and valley splitting, these heterostructures require Ge concentration profiles close to monolayer precision. Ohmic contacts to undoped heterostructures are usually facilitated by a global annealing step activating implanted dopants, but compromising the carefully engineered layer stack due to atom diffusion and strain relaxation in the active device region. We demonstrate a local laser-based annealing process for recrystallization of ion-implanted contacts in SiGe, greatly reducing the thermal load on the active device area. To quickly adapt this process to the constantly evolving heterostructures, we deploy a calibration procedure based exclusively on optical inspection at room temperature. We measure the electron mobility and contact resistance of laser-annealed Hall bars at temperatures below 4.2K and obtain values similar or superior to that of a globally annealed reference sample. This highlights the usefulness of laser-based annealing to take full advantage of high-performance Si/SiGe heterostructures.
(44) Blooming and Pruning: Learning from Mistakes with Memristive Synapses
K. Nikiruy, E. Perez, A. Baroni, K.D.S. Reddy, S. Pechmann, Ch. Wenger, M. Ziegler
Scientific Reports 14, 7802 (2024)
DOI: 10.1038/s41598-024-57660-4, (KI-IoT)
Blooming and pruning is one of the most important developmental mechanisms of the biological brain in the first years of life, enabling it to adapt its network structure to the demands of the environment. The mechanism is thought to be fundamental for the development of cognitive skills. Inspired by this, Chialvo and Bak proposed in 1999 a learning scheme that learns from mistakes by eliminating from the initial surplus of synaptic connections those that lead to an undesirable outcome. Here, this idea is implemented in a neuromorphic circuit scheme using CMOS integrated HfO2-based memristive devices. The implemented two-layer neural network learns in a self-organized manner without positive reinforcement and exploits the inherent variability of the memristive devices. A combined experimental and simulation-based parameter study is presented to find the relevant system and device parameters leading to a compact and robust memristive neuromorphic circuit that can handle association tasks.
(45) Strong Optical Coupling of Lattice Resonances in a Top-Down Fabricated Hybrid Metal−Dielectric Al/Si/Ge Metasurface
P. Oleynik, F. Berkmann, S. Reiter, J. Schlipf, M. Ratzke, Y. Yamamoto, I.A .Fischer
Nano Letters 24(10), 3142 (2024)
DOI: 10.1021/acs.nanolett.3c05050
Optical metasurfaces enable the manipulation of the light–matter interaction in ultrathin layers. Compared with their metal or dielectric counterparts, hybrid metasurfaces resulting from the combination of dielectric and metallic nanostructures can offer increased possibilities for interactions between modes present in the system. Here, we investigate the interaction between lattice resonances in a hybrid metal–dielectric metasurface obtained from a single-step nanofabrication process. Finite-difference time domain simulations show the avoided crossing of the modes appearing in the wavelength-dependent absorptance inside the Ge upon variations in a selected geometry parameter as evidence for strong optical coupling. We find good agreement between the measured and simulated absorptance and reflectance spectra. Our metasurface design can be easily incorporated into a top-down optoelectronic device fabrication process with possible applications ranging from on-chip spectroscopy to sensing.
(46) Optofluidic Biosensors with Si-based Photonic Integrated Circuit Technology
M. Paul, G. Lecci, C. Schumann, A. Mai, P. Steglich
Proc. iCampus Confernce Cottbus (iCCC 2024), 112 (2024)
DOI: 10.5162/iCCC2024/8.3
(47) Repeatability of Automated Edge Coupling for Wafer Level Testing
A. Peczek, T. Minner, Q. Yuan, Ch. Mai, D. Rishavy, L. Zimmermann
Proc. 25th European Conference On Integrated Optics (ECIO 2024), in: Springer Proceedings in Physics, Springer, 402, 71 (2024)
DOI: 10.1007/978-3-031-63378-2_13
In foundries environment the optical characterization of Photonic In-tegrated Circuits (PICs) for process control and device performance verification requires a high throughput test solution. So far, wafer-level characterization of PICs has been limited to the grating couplers as the optical input/output interface. We propose an alternative optical probing technique suitable for automated on-wafer measurements based on edge coupling.
Here, we evaluate a solution based on FormFactor’s CM300-SiPh probe station and the Pharos Probe. A brief overview of the system is given and the repeatabil-ity of the coupling across the wafer is investigated.
(48) Employing Optical Beam-Induced Current Measurement in Side-Channel Analysis
D. Petryk, I. Kabin, J. Bělohoubek, P. Fišer, J. Schmidt, M. Krstic, Z. Dyka
Proc. 36. ITG/GMM/GI-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2024), 15 (2024)
(Total Resilience)
(49) Design and Phase Noise Measurements of an Ultrafast Dual-Modulus Prescaler in 130 nm SiGe:C BiCMOS
L. Polzin, M. van Delden, N. Pohl, H. Rücker, T. Musch
IEEE Transactions on Microwave Theory and Techniques 72(1), 525 (2024)
DOI: 10.1109/TMTT.2023.3329699
The design complexity of high-speed and power-efficient circuits increases to higher operation frequencies. Therefore, this manuscript gives an overview of how to design and optimize fully differential emitter-coupled logic (ECL) gates using two dual-modulus prescalers with switchable division ratios of 4 and 5. The first prescaler is optimized to the highest operation frequencies, up to 142 GHz and even 166 GHz for the division ratios of 5 and 4, respectively. Furthermore, another prescaler has been optimized for the widely used 80 GHz band, which has been heavily promoted by the automotive industry and has a high number of components in that domain. Both prescalers can be utilized in a fully programmable frequency divider with a wide division ratio range. As the measurement of the additive phase noise for frequency-converting devices with excellent noise performance is quite challenging, this is discussed theoretically and carried out practically. The measured jitter is between 500 as and 1.9 fs within integration limits of 100 Hz up to 1 MHz offset frequency.
(50) On-Chip Refractive Index Sensors Based on Plasmonic TiN Nanohole Arrays
S. Reiter, A. Sengül, Ch. Mai, D. Spirito, Ch. Wenger, I.A. Fischer
Proc. IEEE Silicon Photonics Conference (SiPhotonics 2024), TuP10 (2024)
DOI: 10.1109/SiPhotonics60897.2024.10544048, (iCampus II)
(51) Open-Source Software, Fediverse and Custom ROMs as Tools for a Sustainable Internet
S. Rödiger, M. Kögler, M. Birkholz
Proc. Electronics Goes Green Conference (EGG 2024), 655 (2024)
(Bioelectronics)
(52) Selective Epitaxy of Germanium on Silicon for the Fabrication of CMOS Compatible Short-Wavelength Infrared Photodetectors
D. Ryzhak, A.A. Corley-Wiciak, P. Steglich, Y. Yamamoto, J. Frigerio, R. Giani, A. De Iacovo, D. Spirito, G. Capellini
Materials Science in Semiconductor Processing 176, 108308 (2024)
DOI: 10.1016/j.mssp.2024.108308, (VISIR2)
Here we present the selective epitaxial growth of Ge on Si using reduced pressure chemical vapor deposition on SiO2/Si solid masks realized on 200 mm Si wafers, aiming at manufacturing integrated visible/short-wavelength infrared photodetectors. By a suitable choice of the reactants and of the process conditions, we demonstrated highly selective and pattern-independent growth of Ge microstructure featuring high crystalline quality. The Ge “patches” show a distinct faceting, with a flat top (001) facet and low energy facets such as e.g. {113} and {103} at their sidewalls, independently on their size. Interdiffusion of Si in to the Ge microcrystals is limited to an extension of ∼20 nm from the heterointerface. The Ge patches resulted to be plastically relaxed with threading dislocation density values better or on par than those observed in continuous two-dimensional Ge/Si epilayer in the low 107 cm−2 range. A residual tensile strain was observed for patches with size >10 μm, due to elastic thermal strain accumulation, as confirmed by μ-Raman spectroscopy and μ-photoluminescence characterization. Polarization-dependent Raman mapping highlights the strain distribution associated to the tridimensional shape. On this material, Ge photodiodes were fabricated and characterized, showing promising optoelectronic performances.
(53) A Collective Die to Wafer Bonding Approach Based on Surface-Activated Aluminum-Aluminum Thermocompression Bonding
S. Schulze, T. Voß, P. Krüger, M. Wietstruck
IEEE Transactions on Components, Packaging and Manufacturing Technology 14(3), 519 (2024)
DOI: 10.1109/TCPMT.2024.3363236, (GreenICT)
This work presents a collective die to wafer (D2W) bonding concept based on surface-activated aluminum–aluminum (Al–Al) thermocompression bonding, which involves the fabrication of a reusable silicon carrier wafer onto which the dies are placed without additional adhesives. Compared to other methods, the absence of adhesives allows the subsequent processing under ultrahigh vacuum, which is beneficial for low-temperature Al–Al bonding. The Al–Al bonding is performed in an EVG ComBond system, where an argon plasma is used to remove the native oxide. The thermocompression bonding is carried out for 1 h at a temperature of 300 °C with a pressure between 52 and 60 MPa. This article shows an Al–Al collective D2W bonding process with high yield >90%, excellent bond strength >90 MPa, and contact resistances in the milliohms range.
(54) A Collective Die to Wafer Bonding Approach Based on Surface-Activated Aluminum-Aluminum Thermocompression Bonding
S. Schulze, T. Voß, P. Krüger, M. Wietstruck
IEEE Transactions on Components, Packaging and Manufacturing Technology 14(3), 519 (2024)
DOI: 10.1109/TCPMT.2024.3363236, (ESSENCE-6GM)
This work presents a collective die to wafer (D2W) bonding concept based on surface-activated aluminum–aluminum (Al–Al) thermocompression bonding, which involves the fabrication of a reusable silicon carrier wafer onto which the dies are placed without additional adhesives. Compared to other methods, the absence of adhesives allows the subsequent processing under ultrahigh vacuum, which is beneficial for low-temperature Al–Al bonding. The Al–Al bonding is performed in an EVG ComBond system, where an argon plasma is used to remove the native oxide. The thermocompression bonding is carried out for 1 h at a temperature of 300 °C with a pressure between 52 and 60 MPa. This article shows an Al–Al collective D2W bonding process with high yield >90%, excellent bond strength >90 MPa, and contact resistances in the milliohms range.
(55) Determination of the Indirect Bandgap of Lattice-Matched SiGeSn on Ge
D. Schwarz, E. Kasper, F. Bärwolf, I. Costina, M. Oehme
Materials Science in Semiconductor Processing 180, 108565 (2024)
DOI: 10.1016/j.mssp.2024.108565, (SiGeSn NanoFETs)
The first experimental results for the indirect bandgap of SiGeSn, lattice-matched on Ge are reported. The necessary condition for lattice-matching on Ge is a constant ratio of Si/Sn = 3.67. Thus, the investigated composition range is cSn={5.0,7.5,10.0}% and precisely investigated using secondary ion mass spectroscopy. The bandgap determination is based on the extraction of the built-in voltage of a SiGeSn pn++ junction utilizing the so-called capacitance-voltage intercept method. Detailed calculations of the band diagram of the pn++ junction to be investigated, including first level approximations for the effective density of states in the valence and conduction band were performed. The results show that the composition of the alloy strongly influences its bandgap and is ΕLg,SiGeSn={0.588,0.704,0.413}eV, respectively.
(56) Self-Consistent Determination of Interface and Bulk Parameters of Oxide/Si/SiGe/Si Layer Stacks by Means of Simultaneous Measurement of Gate Current and High Frequency Gate Capacitance in Non-Steady State Non-Equilibrium
R. Sorge, W.-C. Wen, M. Lisker, N. Inomata, Y. Yamamoto
Proc. iCampus Cottbus Conference (iCCC 2024), 207 (2024)
DOI: 10.5162/iCCC2024/P28, (SiGeQuant)
(57) Germanium Photodiodes with 3-dB Bandwidths >110 GHz and L-Band Responsivity of >0.7 A/W
D. Steckler, St. Lischke, A. Kroh, A. Peczek, G. Georgieva, L. Zimmermann
IEEE Photonics Technology Letters 36(12), 775 (2024)
DOI: 10.1109/LPT.2024.3398359, (DFG EPIC-Sense 2)
We present germanium p-i-n photodiodes with opto-electrical 3-dB bandwidths >110 GHz while exhibiting high internal responsivity >0.7 AW-1 at 1620 nm wavelength. Compared to our previous work, this is an improvement of >35 % in internal responsivity without sacrificing the photo detectors bandwidths. This was achieved by the introduction of a local reduction of the silicon waveguide thickness right below the germanium body, which improves optical coupling (from the silicon waveguide into the germanium region) and confinement. In this work we study three photodiode device variants in which germanium is laterally sandwiched between complementary in-situ doped Si regions. This approach enables the side-by side realization of germanium p-i-n photodiodes with different widths, featuring different combinations of OE bandwidths and responsivities. We further investigate on the optical-power handling capabilities of these photodiodes by means of responsivity and bandwidth.
(58) Germanium Photodiodes with 3-dB Bandwidths >110 GHz and L-Band Responsivity of >0.7 A/W
D. Steckler, St. Lischke, A. Kroh, A. Peczek, G. Georgieva, L. Zimmermann
IEEE Photonics Technology Letters 36(12), 775 (2024)
DOI: 10.1109/LPT.2024.3398359, (DFG ULTRA 2)
We present germanium p-i-n photodiodes with opto-electrical 3-dB bandwidths >110 GHz while exhibiting high internal responsivity >0.7 AW-1 at 1620 nm wavelength. Compared to our previous work, this is an improvement of >35 % in internal responsivity without sacrificing the photo detectors bandwidths. This was achieved by the introduction of a local reduction of the silicon waveguide thickness right below the germanium body, which improves optical coupling (from the silicon waveguide into the germanium region) and confinement. In this work we study three photodiode device variants in which germanium is laterally sandwiched between complementary in-situ doped Si regions. This approach enables the side-by side realization of germanium p-i-n photodiodes with different widths, featuring different combinations of OE bandwidths and responsivities. We further investigate on the optical-power handling capabilities of these photodiodes by means of responsivity and bandwidth.
(59) Monolithic Integration of 80-GHz Ge Photodetectors and 100-GHz Ge Electro-Absorption Modulators in a Photonic BiCMOS Technology
D. Steckler, St. Lischke, A. Peczek, A. Kroh, J. Beyer, L. Zimmermann
IEEE Transactions on Electron Devices 71(5), 3417 (2024)
DOI: 10.1109/TED.2024.3370128, (DFG EPIC-Sense 2)
We demonstrate a photonic BiCMOS technology featuring waveguide (WG)-coupled germanium electro-absorption modulators (EAMs) and photodetectors with respective 3-dB bandwidths of 100 and 80 GHz, monolithically integrated with high-performance SiGe-heterojunction bipolar transistors (HBTs) and 0.25- μ m CMOS. The EAMs feature dynamic extinction ratios of 2.3 dB at a symbol rate of 112 GBaud at 1.8 V pp and λ = 1590 nm. We demonstrate that there is no degradation of the baseline technology “SG25H5EPIC” in terms of electronic device yield or performance.
(60) Ge-fin Photodiodes with 3-dB Bandwidths Well Beyond 110 GHz for O-Band Receiver Subsystems
D. Steckler, St. Lischke, A. Peczek, L. Zimmermann
Proc. 25th European Conference on Integrated Optics (ECIO 2024), in: Springer Proceedings in Physics, Springer, 402, 58 (2024)
DOI: 10.1007/978-3-031-63378-2_11, (DFG EPIC-Sense 2)
(61) Ge-fin Photodiodes with 3-dB Bandwidths Well Beyond 110 GHz for O-Band Receiver Subsystems
D. Steckler, St. Lischke, A. Peczek, L. Zimmermann
Proc. 25th European Conference on Integrated Optics (ECIO 2024), in: Springer Proceedings in Physics, Springer, 402, 58 (2024)
DOI: 10.1007/978-3-031-63378-2_11, (DFG ULTRA 2)
(62) Ge-fin Photodiodes with 3-dB Bandwidths Well Beyond 110 GHz for O-Band Receiver Subsystems
D. Steckler, St. Lischke, A. Peczek, L. Zimmermann
Proc. 25th European Conference on Integrated Optics (ECIO 2024), in: Springer Proceedings in Physics, Springer, 402, 58 (2024)
DOI: 10.1007/978-3-031-63378-2_11, (CBQD)
(63) On the Dynamic and Static Extinction Ratio of Germanium Electro-Absorption Modulators
D. Steckler, St. Lischke, A. Peczek, L. Zimmermann
Proc. IEEE Silicon Photonics Conference (SiPhotonics 2024), WP2 (2024)
DOI: 10.1109/SiPhotonics60897.2024.10543654, (DFG EPIC-Sense 2)
(64) Design, Fabrication, and Characterization of Integrated Optical Through-Silicon Waveguides for 3D Photonic Interconnections
F. Villasmunta, P. Steglich, C. Villringer, S. Schrader, H. Schenk, A. Mai, M. Regehly
Proc. 24th SPIE Optical Interconnects (OPTO 2024), 12892, 128920I (2024)
DOI: 10.1117/12.3003146
(65) Characterization, Analysis, and Modeling of Long-Term RF Reliability and Degradation of SiGe HBTs for High Power Density Applications
C. Weimer, G.G. Fischer, M. Schröter
IEEE Transactions on Device and Materials Reliability 24(1), 20 (2024)
DOI: 10.1109/TDMR.2023.3343503, (SIGEREL)
This paper aims at determining RF operating limits of SiGe HBTs. Long-term stress tests consisting of RF large-signal stress and periodic measurements of small-signal parameters are performed. Reliable dynamic large-signal transistor operation is demonstrated beyond conventional static safe operating limits. In addition, RF operating limits are identified and degradation of SiGe HBTs accelerated by extreme RF stress is systematically characterized, analyzed and modeled. RF-stress-caused degradation is shown to significantly affect the collector current and demonstrated to be different from electrothermal breakdown caused by DC stress. A modeling approach for estimating SiGe HBT degradation under RF large-signal operating conditions is proposed and shown to agree very well with experimental data.
(66) High Frequency Properties of an Integrated PJFET for Sensor Applications
Ch. Wipf, R. Sorge
Proc. iCampus Cottbus Conference (iCCC 2024), 216 (2024)
DOI: 10.5162/iCCC2024/P30
(67) Thin and Locally Dislocation-Free SiGe Virtual Substrate Fabrication by Lateral Selective Growth
Y. Yamamoto, W.-C. Wen, M.A. Schubert, A.A. Corley-Wiciak, S. Sugawa, Y. Ito, R. Yokogawa, H. Han, R. Loo, A. Ogura, B. Tillack
Japanese Journal of Applied Physics 63(2), 02SP53 (2024)
DOI: 10.35848/1347-4065/ad189d
Locally dislocation-free SiGe-on-insulator (SGOI) is fabricated by chemical vapor deposition. Lateral selective SiGe growth of ~30%, ~45% and ~55% is performed around ~1 µm square Si(001) pillar located under the center of a 6.3 µm square SiO2 on Si-on-insulator substrate which is formed by H2-HCl vapor phase etching. The selective SiGe is deposited by H2-SiH2Cl2-GeH4-HCl. In the deposited SiGe layer, tensile strain is observed by top-view. The degree of strain is slightly increased at the corner of the SiGe. The tensile strain is caused by the partial compressive strain of SiGe in lateral direction and thermal expansion difference between Si and SiGe. Slightly higher Ge incorporation is observed in higher tensile strain region. At the peaks formed between the facets of growth front, Ge incorporation is reduced. These phenomena are pronounced for SiGe with higher Ge contents. Dislocation-free SGOI is formed along <010> from the Si pillar by lateral aspect-ratio-trapping.
