IHP’s Technology department focuses on the development of devices, modules and technologies with specific properties for applications in communications, high-frequency electronics, sensor technologies and novel areas such as artificial intelligence and quantum technologies. The internal transfer of these developments to manufacturing in the own pilot line for IHP projects and for the worldwide MPW and prototyping service is another focus.

Research and development of the department consists of two main areas. One is the R&D of new devices, modules and technology platforms that are compatible with a Si-based process environment. The second area focuses on the transfer, optimization, stabilization and performance enhancement of existing IHP technologies. The goal is to offer selected modules and technologies to academic as well as to industrial partners within the IHP research service. The main focus of the work is the research and development of technology modules and integration concepts that can significantly enhance the functionality of CMOS technologies.

The strategic research topics are technologies with SiGe-based THz devices, Si/Ge photonic modules, devices for radiation-resistant applications and novel integration concepts, e.g. for high-frequency systems. In this context, the department pursues both monolithic and heterogeneous integration approaches. These approaches enable the combination of electronics with the functionality of the integrated modules on one chip. Applications for such technologies are especially in wireless, broadband and optical communication, in sensor technology and new fields of application such as artificial intelligence.

Considerable efforts are being made to qualify and expand the MPW and prototyping services based on the 0.25 µm and 0.13 µm technologies and to make them available to partners and customers worldwide.

Research, MPW & Prototyping Service

For more than 20 years, technological competence combined with curiosity for new developments has been the basis for continuous progress in the technology department of IHP, where about half of the institute's staff is employed, including those working in 24/7 clean room operation.

Technical Competencies

IHP is equipped with all the competencies necessary for developing and running world-class BiCMOS technologies:

  • SiGe:C HBTs and photonics modules (e.g. Ge-PD) and their integration into CMOS technologies
  • modular extension of standard CMOS technologies
  • process module and process step research and development
  • electrical and opto-electrical measurements including RF tests
  • diagnostic and analytical techniques necessary for developing and running technologies
  • reliability and process qualification
  • ensuring stable and reliable processes in the 24/7 operated CMOS-clean room
  • research and module services as well as MPW and prototyping offerings for internal and external customers
  • design kit support for internal and external projects
  • transfer of technologies and technology modules from and to industrial partners
  • integrating new materials into Si-based technologies

Technical Basis

The following methods are currently being used:

Prof. Andreas Mai

Department Head
Im Technologiepark 25
15236 Frankfurt (Oder)

Katja Albani
Phone: +49 335 5625 670
Fax: +49 335 5625 327
Send e-mail »

Kathleen Schulte
Phone: +49 335 5625 660
Fax: +49 335 5625 327
Send e-mail »

24/7 R&D Pilot Line

The heart of the IHP is the state-of-the-art pilot line in a 1,500 m2 clean room, which is operated 24 hours/7 days a week. In addition, a further 300 m² of cleanroom space is available to enable wafer interconnects and heterointegration of chiplets.

The toolset enables 0.13-µm technology on 200-mm wafers. Cycle times are typically two days per lithography mask. Processing times from tape-in to shipping of diced chips are approximately 12 weeks, depending on the technology used.

Key wafer fabrication equipment within the pilot line includes:

  • I-line and DUV (248 nm laser exposure) photolithography
  • CMP in front-end of line (oxide, poly Si) and back-end of line (oxide, tungsten)
  • dry etch processes for standard CMOS and BiCMOS process modules
  • PVD (Co, Al, Ti, TiN, Ni) and CVD (W, TiN) for the Al metallization system
  • Atomic-Layer-Deposition ALN for HfO2, Al2O, SiO2 and SiN
  • PECVD (inclusive HDP) and SACVD for deposition of dielectrics in front-end of line and back-end of line
  • wet etch and wet clean processes required for a technological level of 0.13 µm
  • low temperature Si, SiGe, SiGe:C epitaxy (differential, and selective epitaxy)
  • low to medium energy and low to high dose ion implantation (As, B, P, In, Sb, Si, Ge, F, Ar)
  • oxidation, LPCVD (including low temperature oxide and nitride), and annealing in standard batch systems
  • RTP for annealing, oxidation, and silicidation
  • 8” high-vacuum bonding system
  • 8” transfer printing toolset 
  • inline measurements for CD, overlay, thickness, resistance, defectivity, topology (SEM, AFM), and XRD
  • parametric test using two fully automatic test systems

Electrical characterization and material analysis

The following key methods are employed for offline diagnostics and analytics, electrical measurements, and reliability tests:

  • DC Parameter set-up for on-wafer and packaged device measurements
  • LF Noise setup for 1/f noise on wafer measurements
  • ring oscillator set-up for on-wafer and packaged device measurements
  • S-Parameter/DC/RF-noise equipment for on-wafer measurement
  • S-Parameter/DC equipment for parameter extraction, device modeling
  • digital tester for digital/mixed signal functional test
  • MOS-CV/IV equipment for DC/CV characterization
  • tester for intrinsic reliability testing for technology qualification

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