Publications 2021

Script list Publications

(1) Plesiochronous Spread Spectrum Clocking with Guaranteed QoS for In-Band Switching Noise Reduction
X. Fan, M. Babic, S. Zhang, E. Grass, M. Krstic
IEEE Transactions on Circuits and Systems I 68(7), 3031 (2021)
DOI: 10.1109/TCSI.2021.3076206, (GASEBO)
Spread spectrum clocking (SSC) conventionally uses frequency modulations (FM) to suppress digital switching noise in the frequency domain. While clock-FM effectively reduces spectral noise peaks, it maintains synchronous operation per cycle with the total noise unchanged. In this paper, we introduce plesiochronous design as a general applicable de-synchronization solution for the spectral switching noise optimization with guaranteed quality-ofservice. By modelling on-chip aperiodic supply current as a polycyclostationary random process, we theoretically prove that digital plesiochronous design contributes to reducing both, total and peak switching noise, in a harmonic frequency band of interest logarithmically proportional to the number of adopted clock domains over the synchronous design. A complete framework is then developed to implement the plesiochronous design with optimal clock domain partitioning and FIFO-based synchronization that features a minimum depth of six by employing Johnson encoding fully compatible with mainstream design flows. As measured on a 130nm pipelined FFT test chip across 25 dies taking process variations further into account, our plesiochronous SSC achieves on average 5.1dB total power reductions in addition to 12.8dB peak power reductions of substrate noise at the clock fundamental frequency, which match our predictions, with marginal hardware overhead in cell area and power consumption on silicon.

(2) Plesiochronous Spread Spectrum Clocking with Guaranteed QoS for In-Band Switching Noise Reduction
X. Fan, M. Babic, S. Zhang, E. Grass, M. Krstic
IEEE Transactions on Circuits and Systems I 68(7), 3031 (2021)
DOI: 10.1109/TCSI.2021.3076206, (ENROL)
Spread spectrum clocking (SSC) conventionally uses frequency modulations (FM) to suppress digital switching noise in the frequency domain. While clock-FM effectively reduces spectral noise peaks, it maintains synchronous operation per cycle with the total noise unchanged. In this paper, we introduce plesiochronous design as a general applicable de-synchronization solution for the spectral switching noise optimization with guaranteed quality-ofservice. By modelling on-chip aperiodic supply current as a polycyclostationary random process, we theoretically prove that digital plesiochronous design contributes to reducing both, total and peak switching noise, in a harmonic frequency band of interest logarithmically proportional to the number of adopted clock domains over the synchronous design. A complete framework is then developed to implement the plesiochronous design with optimal clock domain partitioning and FIFO-based synchronization that features a minimum depth of six by employing Johnson encoding fully compatible with mainstream design flows. As measured on a 130nm pipelined FFT test chip across 25 dies taking process variations further into account, our plesiochronous SSC achieves on average 5.1dB total power reductions in addition to 12.8dB peak power reductions of substrate noise at the clock fundamental frequency, which match our predictions, with marginal hardware overhead in cell area and power consumption on silicon.

(3) A 112 Gb/s Radiation-Hardened Mid-Board Optical Transceiver in 130-nm SiGe BiCMOS for Intra-Satellite Links
S. Giannakopoulos, I. Sourikopoulos, L. Stampoulidis, P. Ostrovskyy, F. Teply, K. Tittelbach-Helmrich, G. Panic, G. Fischer, A. Grabowski, H. Zirath, P. Ayzac, N. Venet, A. Maho, M. Sotom, S. Jones, G. Wood, I. Oxtoby
Frontiers in Physics 9, 672941 (2021)
DOI: 10.3389/fphy.2021.672941, (SIPhoDiAS)
We report the design of a 112 Gb/s radiation-hardened (RH) optical transceiver applicable to intra-satellite optical interconnects. The transceiver chipset comprises a vertical-cavity surface-emitting laser (VCSEL) driver and transimpedance amplifier (TIA) integrated circuits (ICs) with four channels per die, which are adapted for a flip-chip assembly into a mid-board optics (MBO) optical transceiver module. The ICs are designed in the IHP 130 nm SiGe BiCMOS process (SG13RH) leveraging proven robustness in radiation environments and high-speed performance featuring bipolar transistors (HBTs) with fT/fMAX values of up to 250/340 GHz. Besides hardening by technology, radiation-hardened-by-design (RHBD) components are used, including enclosed layout transistors (ELTs) and digital logic cells. We report design features of the ICs and the module, and provide performance data from post-layout simulations. We present radiation evaluation data on analog devices and digital cells, which indicate that the transceiver ICs will reliably operate at typical total ionizing dose (TID) levels and single event latch-up thresholds found in geostationary satellites.

(4) Synchronization in 5G Networks: A Hybrid Bayesian Approach Towards Clock Offset/Skew Estimation and its Impact on Localization
M. Goodarzi, D. Cvetkovski, N. Maletic, J. Gutierrez Teran, E. Grass
EURASIP Journal on Wireless Communications and Networking 91 (2021)
DOI: 10.1186/s13638-021-01963-x, (5G-CLARITY)
Clock synchronization has always been a major challenge when designing wireless networks. This work focuses on tackling the time synchronization problem in 5G networks by adopting a hybrid Bayesian approach for clock offset and skew estimation. Furthermore, we provide an in-depth analysis of the impact of the proposed approach on a synchronization-sensitive service, i.e. localization. Specifically, we expose the substantial benefit of Belief Propagation (BP) running on Factor Graphs (FGs) in achieving precise network-wide synchronization. Moreover, we take advantage of Bayesian Recursive Filtering (BRF) to mitigate the time-stamping error in pairwise synchronization. Finally, we reveal the merit of hybrid synchronization by dividing a large-scale network into local synchronization domains and applying the most suitable synchronization algorithm (BP- or BRF-based) on each domain. The performance of the hybrid approach is then evaluated in terms of the Root Mean Square Errors (RMSEs) of the clock offset, clock skew, and the position estimation. According to the simulations, in spite of the simplifications in the hybrid approach, RMSEs of clock offset, clock skew, and position estimation remain below 10 ns, 1 ppm, and 1.5 m, respectively.

(5) Multi-Channel RF Supervision Module for Thermal Magnetic Resonance based Cancer Therapy
H. Han, E. Oberacker, A. Kuehne, S. Wang, T.W. Eigentler, E. Grass, T. Niendorf
Cancers 13(5), 1001 (2021)
DOI: 10.3390/cancers13051001, (IHP - Humboldt-Universität Joint-Lab)
Glioblastoma multiforme (GBM) is the most lethal and common brain tumor. Combining hyperthermia with chemotherapy and/or radiotherapy improves the survival of GBM patients. Thermal magnetic resonance (ThermalMR) is a hyperthermia variant that exploits radio frequency (RF)-induced heating to examine the role of temperature in biological systems and disease. The RF signals’ power and phase need to be supervised to manage the formation of the energy focal point, accurate thermal dose control, and safety. Patient position during treatment also needs to be monitored to ensure the efficacy of the treatment and avoid damages to healthy tissue. This work reports on a multi-channel RF signal supervision module that is capable of monitoring and regulating RF signals and detecting patient motion. System characterization was performed for a broad range of frequencies. Monte-Carlo simulations were performed to examine the impact of power and phase errors on hyperthermia performance. The supervision module’s utility was demonstrated in characterizing RF power amplifiers and being a key part of a feedback control loop regulating RF signals in heating experiments. Electromagnetic field simulations were conducted to calculate the impact of patient displacement during treatment. The supervision module was experimentally tested for detecting patient motion to a submillimeter level. To conclude, this work presents a cost-effective RF supervision module that is a key component for a hyperthermia hardware system and forms a technological basis for future ThermalMR applications.

(6) On the Complexity of Attacking Commercial Authentication Products
I. Kabin, Z. Dyka, D. Klann, J. Schäffner, P. Langendörfer
Microprocessors and Microsystems 80, 103480 (2021)
DOI: 10.1016/j.micpro.2020.103480, (Total Resilience)
In this paper we discuss the difficulties of mounting successful attack against crypto implementations when essential information is missing. We start with a detailed description of our attack against our own design, to highlight which information is needed to increase the success of an attack, i.e. we use it as a blueprint to the following attack against commercially available crypto chips. We would like to stress that our attack against our own design is very similar to what happens during certification e.g. according to Common Criteria Standard as in those cases the manufacturer need to provide detailed information. When attacking the commercial designs without signing NDAs, we needed to intensively search the Internet for information about the designs. We cannot to reveal the private keys used by the attacked commercial authentication chips 100% correctly. Moreover, the missing knowledge of the used keys does not allow us to evaluate the success of our attack. We were able to reveal information on the processing sequence during the authentication process even as detailed as identifying the clock cycles in which the individual key bits are processed. To summarize the effort of such an attack is significantly higher than the one of attacking a well-known implementation.

(7) Modelling Power Amplifier Impairments in mmWave Phased-Array Systems
N. Maletic, E. Grass
Electronics Letters 57(13), 532 (2021)
DOI: 10.1049/ell2.12184, (IHP - Humboldt-Universität Joint-Lab)
This letter presents an analytical framework to study the distortion effect of power amplifiers (PA) in a single‐stream millimetre wave (mmWave) system with a radio‐frequency beamforming architecture. A third‐order nonlinearity PA model is used. The impact of PA nonlinearity on the transmitter performance is evaluated by means of its normalised mean square error. Also, the effect of PA compression on the system capacity in a line‐of‐sight channel is analysed. All analytical results are supported with Monte‐Carlo simulations.

(8) Modelling Power Amplifier Impairments in mmWave Phased-Array Systems
N. Maletic, E. Grass
Electronics Letters 57(13), 532 (2021)
DOI: 10.1049/ell2.12184, (5GENESIS)
This letter presents an analytical framework to study the distortion effect of power amplifiers (PA) in a single‐stream millimetre wave (mmWave) system with a radio‐frequency beamforming architecture. A third‐order nonlinearity PA model is used. The impact of PA nonlinearity on the transmitter performance is evaluated by means of its normalised mean square error. Also, the effect of PA compression on the system capacity in a line‐of‐sight channel is analysed. All analytical results are supported with Monte‐Carlo simulations.

(9) Mit konventioneller Technologie zum strahlungsharten AMS-Design
O. Schrape, A. Breitenreiter, L. Lu , E.P. Garcia, M. Krstic
Proc. 33. GI/GMM/ITG-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2021), 47 (2021)
(SPAD)

(10) Silicon Systems for Wireless LAN
Z. Stamenkovic, H. Aziza, E. Sanchez, A. Bosio
Proc. 24th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2021), 157 (2021)
DOI: 10.1109/DDECS52668.2021.9417056

(11) Design and Implementation Strategy of Adaptive Processor-Based Systems for Error Resilient and Power-Efficient Operation
M. Veleski, M. Hübner, M. Krstic, R. Kraemer
Proc. 24th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2021), 57 (2021)
DOI: 10.1109/DDECS52668.2021.9417023

(12) Behavioral Model of Dot-Product Engine Implemented with 1T1R Memristor Crossbar Including Assessment
J. Wen, M. Ulbricht, E. Perez, X. Fan, M. Krstic
Proc. 24th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2021), 29 (2021)
DOI: 10.1109/DDECS52668.2021.9417070, (KI-PRO)

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