Publications 2025
Script list Publications
(1) Large Fractional Bandwidth D-Band Power Amplifier for 6G Communications in 130-nm SiGe BiCMOS Technology
M.K. Ali, T. Herbel, G. Panic, D. Kissinger
Proc. 16th German Microwave Conference (GeMiC 2025), 615 (2025)
(6GKom)
(2) Towards Adaptive RISC-V based Systems for Non-Terrestrial Sub-THz Communication
H. Borchert, M. Ulbricht, M. Andjelkovic, D. Göhringer, M. Krstic
Proc. International Conference on Mobile and Miniaturized Terahertz Systems (ICMMTS 2025), (2025)
DOI: 10.1109/ICMMTS62835.2025.10926015, (Scale4Edge)
(3) Towards Adaptive RISC-V based Systems for Non-Terrestrial Sub-THz Communication
H. Borchert, M. Ulbricht, M. Andjelkovic, D. Göhringer, M. Krstic
Proc. International Conference on Mobile and Miniaturized Terahertz Systems (ICMMTS 2025), (2025)
DOI: 10.1109/ICMMTS62835.2025.10926015, (6G-TakeOff)
(4) Towards Adaptive RISC-V based Systems for Non-Terrestrial Sub-THz Communication
H. Borchert, M. Ulbricht, M. Andjelkovic, D. Göhringer, M. Krstic
Proc. International Conference on Mobile and Miniaturized Terahertz Systems (ICMMTS 2025), (2025)
DOI: 10.1109/ICMMTS62835.2025.10926015, (COREnext)
(5) N-Modular Redundancy Controller Generator for Adaptive Fault Tolerance Systems
J.-C. Chen, M. Ulbricht, M. Krstic
Proc. 37. ITG/GMM/GI-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(Open 6G Hub)
(6) Next-Gen TETRISC SoC - A Quad-Heterogeneous Design for Adaptive Fault Tolerance
J.-C. Chen, L. Lu, M. Ulbricht, M. Krstic
Proc. RISC-V Summit Europe (RISC-V 2024)
(Scale4Edge)
(7) N-Modular Redundancy Controller Generator for Adaptive Fault Tolerance Systems
J.-C. Chen, M. Ulbricht, M. Krstic
Proc. 37. ITG/GMM/GI-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(Scale4Edge)
(8) Next-Gen TETRISC SoC - A Quad-Heterogeneous Design for Adaptive Fault Tolerance
J.-C. Chen, L. Lu, M. Ulbricht, M. Krstic
Proc. RISC-V Summit Europe (RISC-V 2024)
(Open 6G Hub)
(9) RRAMs: A Lifecycle Management Strategy for Manufacturing and On-Line Testing
T.S. Copetti, L. Bolzani Poehls
Proc. 37. ITG/GI/GMM-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(10) A Fully-Integrated Four-Channel Phased Array D-Band Transceiver Achieving 10 GBit/s at 10 m
C. Herold, A. Karakuzulu, A. Malignaggi, M. Scheide, N. Maletic, K. Krishnegowda, C. Carta
Proc. 20th IEEE Radio & Wireless Week (RWW 2025), 30 (2025)
(6G-RIC)
(11) Packet Superposition HARQ Scheme Enabled by LDPC Coupled Codes
Y. Jian, L. Lopacinski, E. Grass
Proc. IEEE Wireless Communications and Networking Conference (WCNC 2025), (2025)
(6G-RIC)
(12) Packet Superposition HARQ Scheme Enabled by LDPC Coupled Codes
Y. Jian, L. Lopacinski, E. Grass
Proc. IEEE Wireless Communications and Networking Conference (WCNC 2025), (2025)
(PSSS-FEC)
(13) URLLC Networks Enabled by STAR-RIS, Rate Splitting, and Multiple Antennas
E. Jorswieck, M. Soleymani, I. Santamaria, J. Gutierrez Teran
Proc. International Conference on Mobile and Miniaturized Terahertz Systems (ICMMTS 2025), (2025)
DOI: 10.1109/ICMMTS62835.2025.10926047
(14) A Software-Defined Radio Solution for Integrated mmWave Communication and Sensing
N. Maletic, M. Petri, M. Appel, E. Grass
Proc. IEEE Wireless Communications and Networking Conference (WCNC 2025), (2025)
(Open 6G Hub)
(15) Messung ökobilanzrelevanter Parameter von MIMO-Kommunikationssystemen in der IHP-Antennenmesskammer
G. Panic, D. Cvetkovski
zu finden unter: https://greenict.de/messung-okobilanzrelevanter-parameter-von-mimo-kommunikationssystemen-in-der-ihp-antennenmesskammer/
(GreenICT)
(16) Demonstration: Real-Time mmWave Integrated Communication and Sensing
M. Petri, N. Maletic
Proc. IEEE Wireless Communications and Networking Conference (WCNC 2025), (2025)
(Open 6G Hub)
(17) Vulnerable or Not: SCA Test Results Strongly Depend on the Measurement Equipment
D. Petryk, I. Kabin, Z. Dyka
Proc. 37. ITG/GMM/GI-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(Total Resilience)
(18) Vulnerable or Not: SCA Test Results Strongly Depend on the Measurement Equipment
D. Petryk, I. Kabin, Z. Dyka
Proc. 37. ITG/GMM/GI-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(Resilient Systems)
(19) Classification of Epileptic Seizures by Simple Machine Learning Techniques: Application to Animals’ Electroencephalography Signals
I. Pidvalnyi, A. Kostenko, O. Sudakov, D. Isaev, O. Maximyuk, O. Krishtal, O. Iegorova, I. Kabin, Z. Dyka, S. Ortmann, P. Langendörfer
IEEE Access 13, 8951 (2025)
DOI: 10.1109/ACCESS.2025.3527866, (DFG-Resilient Systems for Real Time Prediction of Epileptic Seizures)
Detection and prediction of the onset of seizures are among the most challenging problems in epilepsy diagnostics and treatment. Small electronic devices capable of doing that will improve the quality of life for epilepsy patients while also open new opportunities for pharmacological intervention. This paper presents a novel approach using machine learning techniques to detect seizures onset using electroencephalography (EEG) signals. The proposed approach was tested on EEG data recorded in rats with pilocarpine model of temporal lobe epilepsy. A principal component analysis was applied for feature selection before using a support vector machine for the detection of seizures. Hjorth's parameters and Daubechies discrete wavelet transform coefficients were found to be the most informative features of EEG data. We found that the support vector machine approach had a classification sensitivity of 90% and a specificity of 74% for detecting ictal episodes. Changing the epoch parameter from one to twenty-one seconds results in changing the redistribution of principal components’ values to 10% but does not affect the classification result. Support vector machines are accessible and convenient methods for classification that have achieved promising classification quality, and are rather lightweight compared to other machine learning methods. So we suggest their future use in mobile devices for early epileptic seizure and preictal episodes detection.
(20) Classification of Epileptic Seizures by Simple Machine Learning Techniques: Application to Animals’ Electroencephalography Signals
I. Pidvalnyi, A. Kostenko, O. Sudakov, D. Isaev, O. Maximyuk, O. Krishtal, O. Iegorova, I. Kabin, Z. Dyka, S. Ortmann, P. Langendörfer
IEEE Access 13, 8951 (2025)
DOI: 10.1109/ACCESS.2025.3527866, (Total Resilience)
Detection and prediction of the onset of seizures are among the most challenging problems in epilepsy diagnostics and treatment. Small electronic devices capable of doing that will improve the quality of life for epilepsy patients while also open new opportunities for pharmacological intervention. This paper presents a novel approach using machine learning techniques to detect seizures onset using electroencephalography (EEG) signals. The proposed approach was tested on EEG data recorded in rats with pilocarpine model of temporal lobe epilepsy. A principal component analysis was applied for feature selection before using a support vector machine for the detection of seizures. Hjorth's parameters and Daubechies discrete wavelet transform coefficients were found to be the most informative features of EEG data. We found that the support vector machine approach had a classification sensitivity of 90% and a specificity of 74% for detecting ictal episodes. Changing the epoch parameter from one to twenty-one seconds results in changing the redistribution of principal components’ values to 10% but does not affect the classification result. Support vector machines are accessible and convenient methods for classification that have achieved promising classification quality, and are rather lightweight compared to other machine learning methods. So we suggest their future use in mobile devices for early epileptic seizure and preictal episodes detection.
(21) HyRPF: Hybrid RRAM Prototyping on FPGA
D. Reiser, J. Knödtel, L. Almeeva, J. Wen, A. Baroni, M. Krstic, M. Reichenbach
Proc. 24th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2024) in: Lecture Notes in Computer Science, LNCS 15226, 199 (2025)
DOI: 10.1007/978-3-031-78377-7_14
(22) Resistance Test Discovered an Inherent Vulnerability of Cryptographic ASICs to Simple SCA
A.A. Sigourou, Z. Dyka, I. Kabin
Proc. 37. ITG/GMM/GI-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(Resilient Systems)
(23) Resistance Test Discovered an Inherent Vulnerability of Cryptographic ASICs to Simple SCA
A.A. Sigourou, Z. Dyka, I. Kabin
Proc. 37. ITG/GMM/GI-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(Total Resilience)
(24) On-Chip Cross-Layer Sensing for Mission-Mode Monitoring of Resilient Systems: Towards Silicon Lifecycle Management
F. Vargas
Proc. 37. ITG/GI/GMM-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(25) A Cross-Layer Methodology for Assessing Silent Data Corruption Effects on DLA Families
A. Veronesi, M. Krstic, D. Bertozzi
Proc. 37. ITG/GI/GMM-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(26) RRAMulator: An Efficient FPGA-based Emulator for RRAM Crossbar with Device Variability and Energy Consumption Evaluation
J. Wen, F. Vargas, F. Zhu, D. Reiser, A. Baroni, M. Fritscher, E. Perez, M. Reichenbach, Ch. Wenger, M. Krstic
Microelectronics Reliability 168, 115630 (2025)
DOI: 10.1016/j.microrel.2025.115630, (6G-RIC)
The in-memory computing (IMC) systems based on emerging technologies have gained significant attention due to their potential to enhance performance and energy efficiency by minimizing data movement between memory and processing unit, which is especially beneficial for data-intensive applications. Designing and evaluating systems utilizing emerging memory technologies, such as resistive RAM (RRAM), poses considerable challenges due to the limited support from electronics design automation (EDA) tools for rapid development and design space exploration. Additionally, incorporating technology-dependent variability into system-level simulations is critical to accurately assess the impact on system reliability and performance. To bridge this gap, we propose RRAMulator, a field-programmable gate array (FPGA) based hardware emulator for RRAM crossbar array. To avoid the complex device models capturing the nonlinear current–voltage (IV) relationships that degrade emulation speed and increase hardware utilization, we propose a device and variability modeling approach based on device measurements. We deploy look-up tables (LUTs) for device modeling and use the multivariate kernel density estimation (KDE) method to augment existing data, extending data variety and avoiding repetitive data usage. The proposed emulator achieves cycle-accurate, real-time emulations and provides information such as latency and energy consumption for matrix mapping and vector–matrix multiplications (VMMs). Experimental results show a significant reduction in emulation time compared to conventional behavioral simulations. Additionally, an RRAM-based discrete Fourier transform (DFT) accelerator is analyzed as a case study featuring a range of in-depth system assessments.
(27) ImSTDP: Implicit Timing On-Chip STDP Learning
D. Zhao, O. Schrape, Z. Stamenkovic, M. Krstic
IEEE Transactions on Circuits and Systems I 72(2), 868 (2025)
DOI: 10.1109/TCSI.2024.3450958
Spike-Timing-Dependent Plasticity (STDP) is a biological-plausible learning mechanism widely adopted for building Spiking Neural Networks (SNNs). It determines plasticity polarity and synapse strength change according to the timing difference between pre-and postsynaptic spikes. The learning curves of STDP differ in temporal window size, magnitude and polarity across different synapse types and brain regions and even within a cell, in different dendritic compartments. To accelerate on-chip STDP learning, various implementations have been proposed. However, they either introduce significant latency due to costly counter-based time difference calculation and substantial area cost due to the implementation of weight change LUTs, or lose biologically-plausible timing information due to oversimplification. For low-cost and efficient on-chip learning, a high-throughput Implicit-timing STDP (ImSTDP) with optimized SR depth and a low-cost register-based Implicit-Timing Look-up (ITL) are proposed. ASIC implementation in 22 nm technology demonstrates that ImSTDP can achieve up to 2 × throughput improvement and 3.61 × power efficiency improvement at 27% less area cost compared to the cutting-edge counter-LUT on-chip STDP learning solution.
M.K. Ali, T. Herbel, G. Panic, D. Kissinger
Proc. 16th German Microwave Conference (GeMiC 2025), 615 (2025)
(6GKom)
(2) Towards Adaptive RISC-V based Systems for Non-Terrestrial Sub-THz Communication
H. Borchert, M. Ulbricht, M. Andjelkovic, D. Göhringer, M. Krstic
Proc. International Conference on Mobile and Miniaturized Terahertz Systems (ICMMTS 2025), (2025)
DOI: 10.1109/ICMMTS62835.2025.10926015, (Scale4Edge)
(3) Towards Adaptive RISC-V based Systems for Non-Terrestrial Sub-THz Communication
H. Borchert, M. Ulbricht, M. Andjelkovic, D. Göhringer, M. Krstic
Proc. International Conference on Mobile and Miniaturized Terahertz Systems (ICMMTS 2025), (2025)
DOI: 10.1109/ICMMTS62835.2025.10926015, (6G-TakeOff)
(4) Towards Adaptive RISC-V based Systems for Non-Terrestrial Sub-THz Communication
H. Borchert, M. Ulbricht, M. Andjelkovic, D. Göhringer, M. Krstic
Proc. International Conference on Mobile and Miniaturized Terahertz Systems (ICMMTS 2025), (2025)
DOI: 10.1109/ICMMTS62835.2025.10926015, (COREnext)
(5) N-Modular Redundancy Controller Generator for Adaptive Fault Tolerance Systems
J.-C. Chen, M. Ulbricht, M. Krstic
Proc. 37. ITG/GMM/GI-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(Open 6G Hub)
(6) Next-Gen TETRISC SoC - A Quad-Heterogeneous Design for Adaptive Fault Tolerance
J.-C. Chen, L. Lu, M. Ulbricht, M. Krstic
Proc. RISC-V Summit Europe (RISC-V 2024)
(Scale4Edge)
(7) N-Modular Redundancy Controller Generator for Adaptive Fault Tolerance Systems
J.-C. Chen, M. Ulbricht, M. Krstic
Proc. 37. ITG/GMM/GI-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(Scale4Edge)
(8) Next-Gen TETRISC SoC - A Quad-Heterogeneous Design for Adaptive Fault Tolerance
J.-C. Chen, L. Lu, M. Ulbricht, M. Krstic
Proc. RISC-V Summit Europe (RISC-V 2024)
(Open 6G Hub)
(9) RRAMs: A Lifecycle Management Strategy for Manufacturing and On-Line Testing
T.S. Copetti, L. Bolzani Poehls
Proc. 37. ITG/GI/GMM-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(10) A Fully-Integrated Four-Channel Phased Array D-Band Transceiver Achieving 10 GBit/s at 10 m
C. Herold, A. Karakuzulu, A. Malignaggi, M. Scheide, N. Maletic, K. Krishnegowda, C. Carta
Proc. 20th IEEE Radio & Wireless Week (RWW 2025), 30 (2025)
(6G-RIC)
(11) Packet Superposition HARQ Scheme Enabled by LDPC Coupled Codes
Y. Jian, L. Lopacinski, E. Grass
Proc. IEEE Wireless Communications and Networking Conference (WCNC 2025), (2025)
(6G-RIC)
(12) Packet Superposition HARQ Scheme Enabled by LDPC Coupled Codes
Y. Jian, L. Lopacinski, E. Grass
Proc. IEEE Wireless Communications and Networking Conference (WCNC 2025), (2025)
(PSSS-FEC)
(13) URLLC Networks Enabled by STAR-RIS, Rate Splitting, and Multiple Antennas
E. Jorswieck, M. Soleymani, I. Santamaria, J. Gutierrez Teran
Proc. International Conference on Mobile and Miniaturized Terahertz Systems (ICMMTS 2025), (2025)
DOI: 10.1109/ICMMTS62835.2025.10926047
(14) A Software-Defined Radio Solution for Integrated mmWave Communication and Sensing
N. Maletic, M. Petri, M. Appel, E. Grass
Proc. IEEE Wireless Communications and Networking Conference (WCNC 2025), (2025)
(Open 6G Hub)
(15) Messung ökobilanzrelevanter Parameter von MIMO-Kommunikationssystemen in der IHP-Antennenmesskammer
G. Panic, D. Cvetkovski
zu finden unter: https://greenict.de/messung-okobilanzrelevanter-parameter-von-mimo-kommunikationssystemen-in-der-ihp-antennenmesskammer/
(GreenICT)
(16) Demonstration: Real-Time mmWave Integrated Communication and Sensing
M. Petri, N. Maletic
Proc. IEEE Wireless Communications and Networking Conference (WCNC 2025), (2025)
(Open 6G Hub)
(17) Vulnerable or Not: SCA Test Results Strongly Depend on the Measurement Equipment
D. Petryk, I. Kabin, Z. Dyka
Proc. 37. ITG/GMM/GI-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(Total Resilience)
(18) Vulnerable or Not: SCA Test Results Strongly Depend on the Measurement Equipment
D. Petryk, I. Kabin, Z. Dyka
Proc. 37. ITG/GMM/GI-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(Resilient Systems)
(19) Classification of Epileptic Seizures by Simple Machine Learning Techniques: Application to Animals’ Electroencephalography Signals
I. Pidvalnyi, A. Kostenko, O. Sudakov, D. Isaev, O. Maximyuk, O. Krishtal, O. Iegorova, I. Kabin, Z. Dyka, S. Ortmann, P. Langendörfer
IEEE Access 13, 8951 (2025)
DOI: 10.1109/ACCESS.2025.3527866, (DFG-Resilient Systems for Real Time Prediction of Epileptic Seizures)
Detection and prediction of the onset of seizures are among the most challenging problems in epilepsy diagnostics and treatment. Small electronic devices capable of doing that will improve the quality of life for epilepsy patients while also open new opportunities for pharmacological intervention. This paper presents a novel approach using machine learning techniques to detect seizures onset using electroencephalography (EEG) signals. The proposed approach was tested on EEG data recorded in rats with pilocarpine model of temporal lobe epilepsy. A principal component analysis was applied for feature selection before using a support vector machine for the detection of seizures. Hjorth's parameters and Daubechies discrete wavelet transform coefficients were found to be the most informative features of EEG data. We found that the support vector machine approach had a classification sensitivity of 90% and a specificity of 74% for detecting ictal episodes. Changing the epoch parameter from one to twenty-one seconds results in changing the redistribution of principal components’ values to 10% but does not affect the classification result. Support vector machines are accessible and convenient methods for classification that have achieved promising classification quality, and are rather lightweight compared to other machine learning methods. So we suggest their future use in mobile devices for early epileptic seizure and preictal episodes detection.
(20) Classification of Epileptic Seizures by Simple Machine Learning Techniques: Application to Animals’ Electroencephalography Signals
I. Pidvalnyi, A. Kostenko, O. Sudakov, D. Isaev, O. Maximyuk, O. Krishtal, O. Iegorova, I. Kabin, Z. Dyka, S. Ortmann, P. Langendörfer
IEEE Access 13, 8951 (2025)
DOI: 10.1109/ACCESS.2025.3527866, (Total Resilience)
Detection and prediction of the onset of seizures are among the most challenging problems in epilepsy diagnostics and treatment. Small electronic devices capable of doing that will improve the quality of life for epilepsy patients while also open new opportunities for pharmacological intervention. This paper presents a novel approach using machine learning techniques to detect seizures onset using electroencephalography (EEG) signals. The proposed approach was tested on EEG data recorded in rats with pilocarpine model of temporal lobe epilepsy. A principal component analysis was applied for feature selection before using a support vector machine for the detection of seizures. Hjorth's parameters and Daubechies discrete wavelet transform coefficients were found to be the most informative features of EEG data. We found that the support vector machine approach had a classification sensitivity of 90% and a specificity of 74% for detecting ictal episodes. Changing the epoch parameter from one to twenty-one seconds results in changing the redistribution of principal components’ values to 10% but does not affect the classification result. Support vector machines are accessible and convenient methods for classification that have achieved promising classification quality, and are rather lightweight compared to other machine learning methods. So we suggest their future use in mobile devices for early epileptic seizure and preictal episodes detection.
(21) HyRPF: Hybrid RRAM Prototyping on FPGA
D. Reiser, J. Knödtel, L. Almeeva, J. Wen, A. Baroni, M. Krstic, M. Reichenbach
Proc. 24th International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2024) in: Lecture Notes in Computer Science, LNCS 15226, 199 (2025)
DOI: 10.1007/978-3-031-78377-7_14
(22) Resistance Test Discovered an Inherent Vulnerability of Cryptographic ASICs to Simple SCA
A.A. Sigourou, Z. Dyka, I. Kabin
Proc. 37. ITG/GMM/GI-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(Resilient Systems)
(23) Resistance Test Discovered an Inherent Vulnerability of Cryptographic ASICs to Simple SCA
A.A. Sigourou, Z. Dyka, I. Kabin
Proc. 37. ITG/GMM/GI-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(Total Resilience)
(24) On-Chip Cross-Layer Sensing for Mission-Mode Monitoring of Resilient Systems: Towards Silicon Lifecycle Management
F. Vargas
Proc. 37. ITG/GI/GMM-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(25) A Cross-Layer Methodology for Assessing Silent Data Corruption Effects on DLA Families
A. Veronesi, M. Krstic, D. Bertozzi
Proc. 37. ITG/GI/GMM-Workshop Testmethoden und Zuverlässigkeit von Schaltungen und Systemen (TuZ 2025), (2025)
(26) RRAMulator: An Efficient FPGA-based Emulator for RRAM Crossbar with Device Variability and Energy Consumption Evaluation
J. Wen, F. Vargas, F. Zhu, D. Reiser, A. Baroni, M. Fritscher, E. Perez, M. Reichenbach, Ch. Wenger, M. Krstic
Microelectronics Reliability 168, 115630 (2025)
DOI: 10.1016/j.microrel.2025.115630, (6G-RIC)
The in-memory computing (IMC) systems based on emerging technologies have gained significant attention due to their potential to enhance performance and energy efficiency by minimizing data movement between memory and processing unit, which is especially beneficial for data-intensive applications. Designing and evaluating systems utilizing emerging memory technologies, such as resistive RAM (RRAM), poses considerable challenges due to the limited support from electronics design automation (EDA) tools for rapid development and design space exploration. Additionally, incorporating technology-dependent variability into system-level simulations is critical to accurately assess the impact on system reliability and performance. To bridge this gap, we propose RRAMulator, a field-programmable gate array (FPGA) based hardware emulator for RRAM crossbar array. To avoid the complex device models capturing the nonlinear current–voltage (IV) relationships that degrade emulation speed and increase hardware utilization, we propose a device and variability modeling approach based on device measurements. We deploy look-up tables (LUTs) for device modeling and use the multivariate kernel density estimation (KDE) method to augment existing data, extending data variety and avoiding repetitive data usage. The proposed emulator achieves cycle-accurate, real-time emulations and provides information such as latency and energy consumption for matrix mapping and vector–matrix multiplications (VMMs). Experimental results show a significant reduction in emulation time compared to conventional behavioral simulations. Additionally, an RRAM-based discrete Fourier transform (DFT) accelerator is analyzed as a case study featuring a range of in-depth system assessments.
(27) ImSTDP: Implicit Timing On-Chip STDP Learning
D. Zhao, O. Schrape, Z. Stamenkovic, M. Krstic
IEEE Transactions on Circuits and Systems I 72(2), 868 (2025)
DOI: 10.1109/TCSI.2024.3450958
Spike-Timing-Dependent Plasticity (STDP) is a biological-plausible learning mechanism widely adopted for building Spiking Neural Networks (SNNs). It determines plasticity polarity and synapse strength change according to the timing difference between pre-and postsynaptic spikes. The learning curves of STDP differ in temporal window size, magnitude and polarity across different synapse types and brain regions and even within a cell, in different dendritic compartments. To accelerate on-chip STDP learning, various implementations have been proposed. However, they either introduce significant latency due to costly counter-based time difference calculation and substantial area cost due to the implementation of weight change LUTs, or lose biologically-plausible timing information due to oversimplification. For low-cost and efficient on-chip learning, a high-throughput Implicit-timing STDP (ImSTDP) with optimized SR depth and a low-cost register-based Implicit-Timing Look-up (ITL) are proposed. ASIC implementation in 22 nm technology demonstrates that ImSTDP can achieve up to 2 × throughput improvement and 3.61 × power efficiency improvement at 27% less area cost compared to the cutting-edge counter-LUT on-chip STDP learning solution.
