Publications 2022

Script list Publications

(1) A Broadband Low-Noise Amplifier for D-Band Communications in SiGe BiCMOS Technology
M. Ali, G. Panic, D. Kissinger
Proc. 14th German Microwave Conference (GeMic 2022), 92 (2022)
(6GKom)

(2) A Broadband 110 – 170 GHz Frequency Quadrupler with 29 dBc Harmonic Rejection in a 130-nm SiGe BiCMOS Technology
M. Ali, G. Panic, D. Kissinger
Proc. 17th European Microwave Integrated Circuits Conference (EuMIC 2022), 44 (2022)
(6GKom)

(3) A Design Concept for Radiation Hardened RADFET Readout System for Space Applications
M. Andjelkovic, A. Simevski, J.-C. Chen, O. Schrape, Z. Stamenkovic, M. Krstic, S. Ilic, G. Ristic, A. Jaksic, N. Vasovic, R. Duane, A. Palma, L. Lallena, M. Carvajal
Microprocessors and Microsystems 90, 104486, (2022)
DOI: 10.1016/j.micpro.2022.104486, (ELICSIR)
Instruments for measuring the absorbed dose and dose rate under radiation exposure, known as radiation dosi-meters, are indispensable in space missions. They are composed of radiation sensors that generate current or voltage response when exposed to ionizing radiation, and processing electronics for computing the absorbed dose and dose rate. Among a wide range of existing radiation sensors, the Radiation Sensitive Field Effect Transistors (RADFETs) have unique advantages for absorbed dose measurement, and a proven record of successful exploitation in space missions. It has been shown that the RADFETs may be also used for the dose rate monitoring. In that regard, we propose a unique design concept that supports the simultaneous operation of a single RADFET as absorbed dose and dose rate monitor. This enables to reduce the cost of implementation, since the need for other types of radiation sensors can be minimized or eliminated. For processing the RADFET’s response we propose a readout system composed of analog signal conditioner (ASC) and a self-adaptive multiprocessing system-on-chip (MPSoC). The soft error rate of MPSoC is monitored in real time with embedded sensors, allowing the autonomous switching between three operating modes (high-performance, de-stress and fault-tolerant), according to the application requirements and radiation conditions.

(4) Fast Error Propagation Probability Estimates by Answer Set Programming and Approximate Model Counting
A. Breitenreiter, M. Andjelkovic, O. Schrape, M. Krstic
IEEE Access 10, 51814 (2022)
DOI: 10.1109/ACCESS.2022.3174564, (Scale4Edge)
We present a method employing Answer Set Programming in combination with Approximate Model Counting for fast and accurate calculation of error propagation probabilities in digital circuits. By an efficient problem encoding we achieve an input data format similar to a Verilog netlist so that extensive preprocessing is avoided. By a tight interconnection of our application with the underlying solver, we avoid iterating over fault sites and reduce calls to the solver. Several circuits were analyzed with varying numbers of considered cycles and different degrees of approximation. Our experiments show, that the runtime can be reduced by approximation by a factor of 91 whereas the error compared to the exact result is below 1%.

(5) Solar Particle Event and Single Event Upset Prediction from SRAM-based Monitor and Supervised Machine Learning
J.-C. Chen, T. Lange, M. Andjelkovic, A. Simevski, L. Lu, M. Krstic
IEEE Transactions on Emerging Topics in Computing 10(2), 564 (2022)
DOI: 10.1109/TETC.2022.3147376, (RESCUE)
The intensity of cosmic radiation may differ over five orders of magnitude within a few hours or days during the Solar Particle Events (SPEs), thus increasing for several orders of magnitude the probability of Single Event Upsets (SEUs) in space-borne electronic systems. Therefore, it is vital to enable the early detection of the SEU rate changes in order to ensure timely activation of dynamic radiation hardening measures. In this paper, an embedded approach for the prediction of SPEs and SRAM SEU rate is presented. The proposed solution combines the real-time SRAM-based SEU monitor, the offline-trained machine learning model and online learning algorithm for the prediction. With respect to the state-of-the-art, our solution brings the following benefits: (1) Use of existing on-chip data storage SRAM as a particle detector, thus minimizing the hardware and power overhead, (2) Prediction of SRAM SEU rate one hour in advance, with the fine-grained hourly tracking of SEU variations during SPEs as well as under normal conditions, (3) Online optimization of the prediction model for enhancing the prediction accuracy during run-time, (4) Negligible cost of hardware accelerator design for the implementation of selected machine learning model and online learning algorithm. The proposed design is intended for a highly dependable and self-adaptive multiprocessing system employed in space applications, allowing to trigger the radiation mitigation mechanisms before the onset of high radiation levels.

(6) Solar Particle Event and Single Event Upset Prediction from SRAM-based Monitor and Supervised Machine Learning
J.-C. Chen, T. Lange, M. Andjelkovic, A. Simevski, L. Lu, M. Krstic
IEEE Transactions on Emerging Topics in Computing 10(2), 564 (2022)
DOI: 10.1109/TETC.2022.3147376, (Scale4Edge)
The intensity of cosmic radiation may differ over five orders of magnitude within a few hours or days during the Solar Particle Events (SPEs), thus increasing for several orders of magnitude the probability of Single Event Upsets (SEUs) in space-borne electronic systems. Therefore, it is vital to enable the early detection of the SEU rate changes in order to ensure timely activation of dynamic radiation hardening measures. In this paper, an embedded approach for the prediction of SPEs and SRAM SEU rate is presented. The proposed solution combines the real-time SRAM-based SEU monitor, the offline-trained machine learning model and online learning algorithm for the prediction. With respect to the state-of-the-art, our solution brings the following benefits: (1) Use of existing on-chip data storage SRAM as a particle detector, thus minimizing the hardware and power overhead, (2) Prediction of SRAM SEU rate one hour in advance, with the fine-grained hourly tracking of SEU variations during SPEs as well as under normal conditions, (3) Online optimization of the prediction model for enhancing the prediction accuracy during run-time, (4) Negligible cost of hardware accelerator design for the implementation of selected machine learning model and online learning algorithm. The proposed design is intended for a highly dependable and self-adaptive multiprocessing system employed in space applications, allowing to trigger the radiation mitigation mechanisms before the onset of high radiation levels.

(7) 5G-CLARITY: 5G-Advanced Private Networks Integrating 5GNR, Wi-Fi and LiFi
T. Cogalan, D. Camps-Mur, J. Gutierrez Teran, S. Videv, V. Sark, J. Prados-Garzon, J. Ordonez-Lucena, H. Khalili, F. Canellas, A. Fernandez-Fernandez, M. Goodarzi, A. Yesilkaya, R. Bian, S. Raju, M. Ghoraishi, H. Haas, O. Adamuz-Hinojosa, A. Garcia, C. Colman-Meixnerx, A. Mourad, E. Aumayr
IEEE Communications Magazine, GCN (Global Communications Newsletters) 60(2), 73 (2022)
DOI: 10.1109/MCOM.001.2100615, (5G-CLARITY)
The future of the manufacturing industry highly depends on digital systems that transform existing production and monitoring systems into autonomous systems fulfilling stringent requirements in terms of availability, reliability, security, low latency, and positioning with high accuracy. In order to meet such requirements, private 5G networks are considered a key enabling technology. In this paper, we introduce the 5G-CLARITY system that integrates 5G new radio (5GNR), Wi-Fi and light fidelity (LiFi) access networks, and develops novel  anagement enablers to operate 5G-Advanced private networks. We describe three core features of 5G-CLARITY including a multi-connectivity framework, a high precision  positioning server and a management system to orchestrate private network slices. These features are evaluated by means of packet level simulations and an experimental testbed demonstrating the ability of 5G-CLARITY to police access network traffic, to achieve cm-level positioning accuracy, and to provision private network slices in less than one minute.

(8) The Scale4Edge RISC-V Ecosystem
W. Ecker, M. Krstic, A. Mauderer, E. Jentzsch, M. Damian, J. Oppermann, A. Koch, W. Mueller, P. Adelt, V. Herdt, R. Drechsler, R. Stahl, K. Emrich, D. Mueller-Gritschneder, J. Schlamelcher, J. Bormann, W. Kunz, R. Heckmann, G. Angst, R. Wimmer, B. Becker, P. Scholl, P. Palomero Bernardo, O.Bringmann, J. Partzsch, C. Mayr
Proc. Design, Automation and Test in Europe (DATE 2022), 808 (2022)
DOI: 10.23919/DATE54114.2022.9774593, (Scale4Edge)

(9) 55% Fractional-Bandwidth Doherty Power Amplifier in 130-nm SiGe for 5G mm-Wave Applications
A. Franzese, N. Maletic, M.H. Eissa, M.-D. Wei, R. Negra, A. Malignaggi
Proc. 16th European Microwave Integrated Circuits Conference (EuMIC 2021), 273 (2022)
DOI: 10.23919/EuMIC50153.2022.9784073

(10) DNN-Assisted Particle-Based Bayesian Joint Synchronization and Localization
M. Goodarzi, V. Sark, N. Maletic, J. Gutierrez Teran, G. Caire, E. Grass
IEEE Transaction on Communications 70(7), 4837 (2022)
DOI: 10.1109/TCOMM.2022.3180069, (5G-CLARITY)
In this work, we propose a Deep neural network-assisted Particle Filter-based (DePF) approach to address the Mobile User (MU) joint synchronization and localization (sync&loc) problem in ultra dense networks. In particular, DePF deploys an asymmetric time-stamp exchange mechanism between the MUs and the Access Points (APs), which,  traditionally, provides us with information about the MUs' clock offset and skew. However, information about the distance between an AP and an MU is also intrinsic to the propagation delay experienced by exchanged time-stamps. In addition, to estimate the angle of arrival of the received synchronization packet, DePF draws on the multiple signal classification  algorithm that is fed by Channel Impulse Response (CIR) experienced by the sync packets. The CIR is also leveraged on to determine the link condition, i.e. Line-of-Sight (LoS) or Non-LoS. Finally, to perform joint sync\&loc, DePF capitalizes on particle Gaussian mixtures that allow for a hybrid particle-based and parametric Bayesian Recursive Filtering (BRF) fusion of the aforementioned pieces of information and thus jointly estimate the position and clock parameters of the MUs. The simulation results verifies the superiority of the proposed algorithm over the state-of-the-art schemes, especially that of Extended Kalman filter- and linearized BRF-based joint sync&loc. In particular, only drawing on the synchronization time-stamp exchange and CIRs, for 90% of the cases, the absolute position and clock offset estimation error remain below 1 meter and 2 nanoseconds, respectively.

(11) 550 Gbps Fully Parallel Fully Unrolled LDPC Decoder in 28 nm CMOS Technology
A. Hasani, L. Lopacinski, G. Panic, E. Grass
Proc. IEEE European Conference on Networks and Communications & 6G Summit (EuCNC/6G Summit 2022), 429 (2022)
DOI: 10.1109/EuCNC/6GSummit54941.2022.9815814, (PSSS-FEC)

(12) High-Throughput Multi-Frame Decoding of QC-LDPC Codes with Modified Rejection-Based Minimum Finding
A. Hasani, L. Lopacinski, G. Panic, R. Kraemer
IEEE Access 10, 5378 (2022)
DOI: 10.1109/ACCESS.2022.3141493, (PSSS-FEC)
The key computation in the min-sum decoding algorithm of a Low-Density Parity-Check (LDPC) is finding the first two minima and also the location of the first minimum among a set of messages passed from Variable Nodes (VNs) to Check Nodes (CNs) in a Tanner graph. In this paper, we propose a modified rejection-based scheme for this task which is able to find the one-hot sequence of the minimum location instead of its index. We show that this modification effectively reduces the complexity of min-sum decoding algorithm. Additionally, we reveal a pipelining potential in such a rejection-based architecture which facilitates the multi-frame decoding of Low-Density Parity-Check (LDPC) codes and therefore results in an improvement in decoding throughput with bearable hardware overhead. Synthesis and floorplanning in an industrial 28 nm CMOS technology show improved results in terms of throughput, power, and chip area.

(13) Electrically Programmable Analog Device As An Ultraviolet Light Sensor
S. Ilic, M. Sarajlic, D. Vasiljevic-Radovic, M. Andjelkovic, A. Palma, R. Duane, G. Ristic
Proc. International Conference on Elecrtical, Electronic and Computing Engineering (ICETRAN 2022), 404 (2022)
(ELICSIR)

(14) Stacked Floating Gate MOSFET as a Passive Dosimeter
S. Ilic, M. Andjelkovic, M. Carvajal, R. Duane, M. Sarajlic, S. Stankovic, G. Ristic
Proc. 10th International Conference on Radiation in Various Fields of Research (RAD 2022), 113 (2022)
(ELICSIR)

(15) Atomicity and Regularity Principles do not Ensure Full Resistance of ECC Designs Against Single-Trace Attacks
I. Kabin, Z. Dyka, P. Langendörfer
Sensors (MDPI) 22(8), 3083 (2022)
DOI: 10.3390/s22083083, (Total Resilience)
Elliptic Curve Cryptography (ECC) is one of the commonly used standard methods for encrypting and signing messages which is essential when it comes to IoT communication. In this paper we discuss the resistance of our fast dual-field ECDSA accelerator against side-channel analysis attacks. We present our implementation of a design supporting four different NIST Elliptic Curves to allow the reader to understand the discussion of the resistance aspects. For two different target platforms – ASIC and FPGA – we show that the application of atomic patterns, which is in the literature considered to ensure resistance against simple side-channel analysis attacks is not sufficient to prevent neither simple SCA nor horizontal address-bit DPA attacks. We also evaluate an approach to increase the inherent resistance of the design against performed attacks which is based on the activity of the field multiplier.

(16) Rad-Hard Microcontroller with Open Access ISA for Space Applications
M. Krstic, F. Kuentzer, K. Tittelbach-Helmrich, J. Cueto, F. García Donday, M. Schmidt, B. Schommer. C. Ferdinand, A. Söding-Freiherr von Blomberg, C. Calligaro, U. Gatti
Proc. of 9th International Workshop on Analogue and Mixed-Signal Integrated Circuits for Space Applications (AMICSA 2022), (2022)
(MORAL)

(17) Ultra High Speed 802.11n LDPC Decoder with Seven-Stage Pipeline in 28 nm CMOS
L. Lopacinski, A. Hasani, G. Panic, N. Maletic, O. Schrape, J. Gutierrez, M. Krstic, E. Grass, R. Kraemer
Proc. 95th IEEE Vehicular Technology Conference (VTC 2022), (2022)
(PSSS-FEC)

(18) Ultra High-Speed BP Decoder for Polar Codes Achieving 1.4 Tbps in 28 nm CMOS
L. Lopacinski, A. Hasani, G. Panic, N. Maletic, O. Schrape, J. Gutierrez Teran, M. Krstic, E. Grass
Proc. IEEE European Conference on Networks and Communications & 6G Summit (EuCNC/6G Summit 2022), 434 (2022) 
DOI: 10.1109/EuCNC/6GSummit54941.2022.9815566, (PSSS-FEC)

(19) Real-Valued Spreading Sequences for PSSS‑Based High-Speed Wireless Systems
L. Lopacinski, N. Maletic, G. Panic, A. Hasani, J. Gutierrez Teran, E. Grass
IEEE Access 10, 8673 (2022)
DOI: 10.1109/ACCESS.2022.3143808, (PSSS-FEC)
In past years, Parallel Sequence Spread Spectrum (PSSS) has attracted significant attention as a modulation technique for wireless communication systems targeting data rates of 100 Gb/s and beyond. PSSS allows designing high-speed baseband processors, which can be partially implemented in the analog domain. It uses multiple analog-to-digital converters (ADCs) to sample the received baseband signal in parallel, significantly relaxing the sampling rate and ADC complexity. However, due to the sidelobe effects of bipolar m-sequences, PSSS shows lower performance than standard digital modulation schemes. This paper proposes real-valued PSSS spreading sequences with attenuated autocorrelation sidelobes. Such sequences show excellent bit error rate (BER) performance. Moreover, our sequences do not have length restrictions of 2m – 1, like in the case of m-sequences, and reduce the chip area required to implement PSSS transceiver. The proposed sequences also reduce the peak-to-average power ratio (PAPR) of PSSS.

(20) Identifying Critical Flip-flops in Circuits with Graph Convolutional Networks
L. Lu, J.-C. Chen, M. Ulbricht, M. Krstic
Proc. IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2022), (2022)
(Scale4Edge)

(21) TDoA Positioning in Wi-Fi based Systems
N. Manjappa, V. Sark, J. Gutierrez Teran, E. Grass
Proc. 9th Small Systems Simulation Symposium (SSSS 2022), 81 (2022)
(5G-CLARITY)

(22) Simulation of Single Event Transient Effects in CMOS Circuits using Open Access Tools and Device Models
M. Marjanovic, M. Andjelkovic, M. Krstic, G. Ristic
Proc. 10th International Conference on Radiation in Various Fields of Research (RAD 2022), 122 (2022)
(ELICSIR)

(23) Advancements in Edge Computing and Service Orchestration in Support of Advanced Surveillance Services
I. Mesogiti, E. Theodoropoulou, F. Setaki, G. Lyberopoulos, F. Moscateli, K. Kanta, G. Giannoulis, P. Toumasis, D. Apostolopoulos, H. Avramopoulos, L. Lopacinski, J. Gutierrez Teran, A. Nanos, Y. Leiba, M. Anastasopoulos, A. Tzanakaki
Proc. IFIP International Conference on Artificial Intelligence Applications and Innovations (AIAI 2022), in: IFIP Advances in Information and Communication Technology, Springer, IFIPAICT 652, 53 (2022)
DOI: 10.1007/978-3-031-08341-9_5, (5G-COMPLETE)

(24) Effective Rate of URLLC with Short Block-Length Information Theory
N. Odhah, E. Grass, R. Kraemer
KuVS Fachgespräch - Würzburg Workshop on Next-Generation Communication Networks (WüWoWAS 2022), (2022)
(5G-REMOTE)

(25) Designing a Power Efficient Sensor Node Microcontroller
G. Panic, M. Krstic
IFAC-PapersOnLine 55(4), 298 (2022)
DOI: 10.1016/j.ifacol.2022.06.049
The energy efficiency of wireless sensor nodes is determined by the power efficiency of underlying hardware, network topology and the profile of target application. In this paper, we present the methodology aimed to select optimal power saving strategy when designing an embedded sensor node microcontroller for specific application. The goal of presented methodology is to select the best-suited power saving techniques to be implemented in sensor node hardware based on the activity profile of the target application. The paper describes applied approach and shows the results of the microcontroller implementation targeting security demanding sensor network applications.

(26) Laser Fault Injection Attacks against IHP Rad-Hard Techniques
D. Petryk, Z. Dyka
Proc. 34th Crypto-Day Matters 2022, (2022)
(Total Resilience)

(27) Crop Prediction based on Characteristics of the Agricultural Environment using Various Feature Selection Techniques and Classifiers
S.P. Raja, B. Sawicka, Z. Stamenkovic, G. Mariammal
IEEE Access 10, 23625 (2022)
DOI: 10.1109/ACCESS.2022.3154350
Agriculture is a growing field of research. In particular, crop prediction in agriculture is critical and is chiefly contingent upon soil and environment conditions, including rainfall, humidity, and temperature. In the past, farmers were able to decide on the crop to be cultivated, monitor its growth, and determine when it could be harvested. Today, however, rapid changes in environmental conditions have made it difficult for the farming community to continue to do so. Consequently, in recent years, machine learning techniques have taken over the task of prediction, and this work has used several of these to determine crop yield. To ensure that a given machine learning (ML) model works at a high level of precision, it is imperative to employ efficient feature selection methods to preprocess the raw data into an easily computable Machine Learning friendly dataset. To reduce redundancies and make the ML model more accurate, only data features that have a significant degree of relevance in determining the final output of the model must be employed. Thus, optimal feature selection arises to ensure that only the most relevant features are accepted as a part of the model. Conglomerating every single feature from raw data without checking for their role in the process of making the model will unnecessarily complicate our model. Furthermore, additional features which contribute little to the ML model will increase its time and space complexity and affect the accuracy of the model’s output. The results depict that an ensemble technique offers better prediction accuracy than the existing classification technique.

(28) Sensitivity and Fading of Irradiated RADFETs with Different Gate Voltages
G. Ristic, S. Ilic, M. Andjelkovic, R. Duane, A. Palma, A. Lallena, M. Krstic, A. Jaksic
Nuclear Instruments and Methods in Physics Research Section A 1029, 166473 (2022)
DOI: 10.1016/j.nima.2022.166473, (ELICSIR)
The radiation-sensitive field-effect transistors (RADFETs) with an oxide thickness of 400 nm are irradiated with gate voltages of 2, 4 and 6 V, and without gate voltage. A detailed analysis of the mechanisms responsible for the creation of traps during irradiation is performed. The creation of the traps in the oxide, near and at the silicon/silicon-dioxide (Si/SiO2) interface during irradiation is modelled very well. This modelling can also be used for other MOS transistors containing SiO2. The behaviour of radiation traps during postirradiation annealing is analyzed, and the corresponding functions for their modelling are obtained. The switching traps (STs) do not have significant influence on threshold voltage shift, and two radiation-induced trap types fit the fixed traps (FTs) very well. The fading does not depend on the positive gate voltage applied during irradiation, but it is twice lower in case there is no gate voltage. A new dosimetric parameter, called the Golden Ratio (GR), is proposed, which represents the ratio between the threshold voltage shift after irradiation and fading after spontaneous annealing. This parameter can be useful for comparing MOS dosimeters.

(29) Commercial P-Channel Power VDMOSFET as X-Ray Dosimeter
G. Ristic, S. Ilic, S. Veljkovic, A. Jevtic, S. Dimitrijevic, A. Palma, S. Stankovic, M. Andjelkovic
Electronics (MDPI) 11(6), 918 (2022)
DOI: 10.3390/electronics11060918, (ELICSIR)
The possibility of using commercial p-channel power vertical double-diffused metal-oxide-semiconductor field-effect transistors (VDMOSFETs) as X-ray sensors is investigated in this case study. In this aspect, the dependence of sensitivity on both the gate voltage and the mean energy for three X-ray beams is examined. The eight gate voltages from 0 to 21 V are applied, and the dependence of the sensitivity on the gate voltage is well fitted using the proposed equation. Regarding X-ray energy, the sensitivity first increases and then decreases as a consequence of the behavior of the mass energy-absorption coefficients and is the largest for RQR8 beam. As the mass energy-absorption coefficients of SiO2 are not found in the literature, the mass energy-absorption coefficients of silicon are used. The behavior of irradiated transistors during annealing at room temperature without gate polarization is also considered.

(30) Fading of pMOS Dosimeters over a Long Period of Time
G. Ristic, M. Andjelkovic, R. Duane, A. Jaksic
IET Micro & Nano Letters 17(7), 155 (2022)
DOI: 10.1049/mna2.12119, (ELICSIR)
The fading of radiation-sensitive p-channel metal-oxide-semiconductor field-effect transistors (known as RADFETs or pMOS dosimeters) over a long time period of 10 years after irradiation has been investigated. Fading is, in addition to sensitivity, another characteristic of pMOS radiation dosimeters. It is considered as the recovery of threshold voltage of irradiated pMOS dosimeters during ambient annealing without gate polarization. Usually there are the fading data for few months after irradiation only. Although fading is a very important dosimetric characteristic, here it is given for the first time in the lierature in such a long period of time. Two types of pMOS dosimeters with oxide thicknesses of 400 and 1000 nm are used. They are irradiated without and with a 5 V polarization on the gate. For the first time, we came to a very significant result that the key role in fading has the voltage applied during irradiation, but not the thickness of the oxide, and that the pMOS dosimeters irradiated with gate voltage of 5 V have greater fading than pMOS dosimeters irradiated without a gate voltage. Fitting of threshold voltage shift and fading, performed using the radiation-induced Eϒ and Es traps, shows very good agreement with the experimental values.

(31) Thermal Drift Reduction in Photodiode Dosimeters with Switching BIAS
I. Ruiz-Garcia, J. Roman-Raya, P. Escobedo Araque, M. Andjelkovic, D. Guirado, A.J. Palma, M.A. Carvajal
Measurement 199, 111538 (2022)
DOI: 10.1016/j.measurement.2022.111538, (ELICSIR)
The effect of temperature on dosimetric measurements is a major limitation of solid-state dosimeters. This is especially true for PIN photodiode dosimeters, where the dark current depends exponentially on temperature. To minimize this effect, a compensation method is presented that relies on the diode structure itself without the need for an external sensor or device. During irradiation, the photodiode is periodically switched from reverse to forward polarization to determine the temperature of the device. This measurement is based on the linear dependence between the temperature and the forward voltage of the diode when it is operated at constant current. An electronic circuit implementing this procedure was developed and used for experimental characterization of the response to radiation of the BPW34S Si PIN photodiode. The proposed procedure reduced the uncertainty due to thermal drift by a factor of 7.5. In addition, an average dose rate sensitivity of 12 ± 2 nC/cGy was measured, with a sensitivity degradation below 2% for the irradiation cycle of 21.4 Gy performed under a 6 MV photon beam. We have shown that a p-n junction can be successfully used to compensate for the temperature effect on the dosimetric measurement.

(32) Compensation of the Temperature Effect of the Dark Current in Photodiodes Dosimeters
I. Ruiz-Garcia, J. Roman-Raya, M. Andjelkovic, D. Guirado, A. Palma, M. Carvajal
Proc. 10th International Conference on Radiation in Various Fields of Research (RAD 2022), 107 (2022)
(ELICSIR)

(33) Design of ASIC and FPGA System with Supervised Machine Learning for Solar Particle Event Prediction
R. Saric, J.-C. Chen, E. Custovic, G. Panic, J. Kevric, D. Jokic, M. Krstic
IFAC-PapersOnLine 55(4), 230 (2022)
DOI: 10.1016/j.ifacol.2022.06.038, (Scale4Edge)
The magnitude of soft error rate (SER) of integrated circuits (ICs) utilized in space missions is jeopardized due to the inconsistent intensity of radiation exposure. To protect critical electronic elements and ensure desired system performance, it is necessary to establish the real-time detection of space particle events (SPE). This research study assesses eight supervised machine learning algorithms by varying history data length (3 to 24 hours) to predict the occurrence of SPE one hour ahead. Customized SPE hourly predictor based on logistic regression is chosen for hardware implementation owing to high prediction accuracy (96.35%) as well as simplicity. After that, the optimal prototype design of the logistic regression algorithm is implemented on Field Programmable Gate Array (FPGA) with affordable hardware footprint. Finally, the digital design tested on FPGA is simulated to generate an application-specific integrated circuit (ASIC) chip layout (industrial 130 nm) integrated with SPE hourly predictor.

(34) Design of ASIC and FPGA System with Supervised Machine Learning for Solar Particle Event Prediction
R. Saric, J.-C. Chen, E. Custovic, G. Panic, J. Kevric, D. Jokic, M. Krstic
IFAC-PapersOnLine 55(4), 230 (2022)
DOI: 10.1016/j.ifacol.2022.06.038, (RESCUE)
The magnitude of soft error rate (SER) of integrated circuits (ICs) utilized in space missions is jeopardized due to the inconsistent intensity of radiation exposure. To protect critical electronic elements and ensure desired system performance, it is necessary to establish the real-time detection of space particle events (SPE). This research study assesses eight supervised machine learning algorithms by varying history data length (3 to 24 hours) to predict the occurrence of SPE one hour ahead. Customized SPE hourly predictor based on logistic regression is chosen for hardware implementation owing to high prediction accuracy (96.35%) as well as simplicity. After that, the optimal prototype design of the logistic regression algorithm is implemented on Field Programmable Gate Array (FPGA) with affordable hardware footprint. Finally, the digital design tested on FPGA is simulated to generate an application-specific integrated circuit (ASIC) chip layout (industrial 130 nm) integrated with SPE hourly predictor.

(35) Response of Commercial p-Channel Power VDMOS Transistors to Irradiation and Bias Temperature Stress
S. Veljkovic, N. Mitrovic, V. Davidovic, S. Golubovic, S. Djoric-Veljkovic, A. Paskaleva, D. Spassov, S. Stankovic, M. Andjelkovic, Z. Prijic, I. Manic, A. Prijic, G. Ristic, D. Dankovic
Journal of Circuits, Systems, and Computers (JCSC) 31, 2240003 (2022)
DOI: 10.1142/S0218126622400035, (ELICSIR)
In this paper the effects of successively applied static/pulsed negative bias temperature stress and irradiation on commercial p-channel power VDMOS transistors are investigated. To further illustrate the impacts of these stresses on the power devices, the relative contributions of gate oxide charge (Not) and interface traps (Nit) to threshold voltage shifts are shown and studied. It was shown that when irradiation without gate voltage is used, the duration of the preirradiation static NBT stress has a slightly larger effect on the radiation response of power VDMOS transistors. Regarding the fact that the investigated components are more likely to function in the dynamic mode than the static mode in practice, additional analysis was focused on results obtained during the pulsed NBT stress after irradiation. For the components subjected to the pulsed NBT stress after the irradiation, the effects of Not neutralization and Nit passivation (usually related to annealing) are more enhanced than for components subjected to the static NBT stress, because only high temperature is applied during the pulse-off state. It was observed in devices previously irradiated with gate voltage applied, that the decrease of threshold voltage shift is significantly greater during the pulsed NBT stress than during the static NBT stress.

(36) Behaviour of pMOS Dosimeters During and After X-Rays
S. Veljkovic, S.D. Ilic, R. Duane, M. Andelkovic, A.J. Palma, G.S. Ristic
Proc. 10th International Conference on Radiation in Various Fields of Research (RAD 2022), 114 (2022)
(ELICSIR)

(37) Exploring Software Models for the Resilience Analysis of Deep Learning Accelerators: the NVDLA Case Study
A. Veronesi, F. dall&#;Occo, D. Bertozzi, M. Favalli, M. Krstic
Proc. 25th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS 2022), 142 (2022)
DOI: 10.1109/DDECS54261.2022.9770169, (Space Region)

(38) Exploring Software Models for the Resilience Analysis of Deep Learning Accelerators: the NVDLA Case Study
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DOI: 10.1109/DDECS54261.2022.9770169, (Open 6G Hub)

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