System Architectures

The department System Architectures investigates the following topics: Wireless broadband systems, Dependable computing, Neuromorphic Hardware, and Intelligent Internet of Things and provides the services in the domain of System Integration and Test.

The activities on wireless broadband systems are focused on 6G communication systems. Important topics and contributions from the IHP are primarily integrated sensing and communication, which are normally achieved by embedding cooperative time-of-flight methods and non-cooperative radar methods in the communication systems. High data throughput is another objective, with wireless links with 100 Gbit/s and more being targeted here. In this context, the department takes two approaches. These are, on the one hand, increasing the spectral efficiency with the help of beamforming, MIMO and Line-of-Sight (LoS) MIMO processes and, on the other hand, increasing the bandwidth by entering new frequency bands above 100 GHz.

Second important research subject are dependable computing systems for demanding applications such as AI, space or automated driving. In this context, the major focus is on dependable multi-processing architectures, where the trade-off between the performance, power consumption and reliability could be dynamically adapted. Such reconfigurability is enabled by the number of on-chip sensors, providing support for silicon lifetime management.
This topic also includes the active measures to achieve secure processing by investigating the methodology against side-channel attacks and providing secure crypto-engines. Finally, the radhard design methodology is important as space is one of the strategic fields of application for the IHP.

Neuromorphic hardware development evolved in the last years in another research pillar of the department. This includes the investigation of AI processing approaches based on the novel technologies (such as RRAM), novel architectures (such as in memory computing), and innovative algorithmic approaches (such as bioinspired computing, spiking neural networks etc.). Moreover, the department is investigating the link between reliability and AI, by providing reliability investigation of AI hardware, but also using AI to accelerate reliability validation.

The department also pursues approaches beyond hardware development in the domain of the intelligent Internet of Things. In this context, the focus is on secure complex networked cyber physical systems, integrating communication and computation components investigated in the department.   
The department is well recognized in the national and international environment and offers significant research results in the field of broadband communication systems, AI hardware, and dependable circuit solutions. As a result, it participates in a wide range of R&D projects at EU, national and regional level.
This department also has a significant research infrastructure and laboratories, e.g. for chip test, integration service and an antenna measuring chamber. The activities in SYA-department are fully coordinated with the research objectives of the other departments and establish a connection to applications and the corresponding system architectures.
 

Technical Competencies

  • design of fault tolerant computer architectures and multi-processors
  • design methodology for fault tolerant, robust and radhard designs
  • digital signal processing for localization and ranging based on n-way ranging and radar technology
  • management and modelling of hardware for accelerating AI applications
  • highest data rate wireless communication (5G and Beyond-5G)
  • safety related WLAN for low latency systems
  • fronthaul/backhaul networks
  • signal processing for ultra-high speed at 60-300 GHz
  • ASIC design and test

Prof. Miloš Krstić

Department Head

IHP 
Im Technologiepark 25
15236 Frankfurt (Oder)
Germany

Secretary:
Heike Wasgien
Phone: +49 335 5625 342
Fax: +49 335 5625 671 
Send e-mail »

Dalia Hayek
Phone: +49 335 5625 518
Send e-mail »

Technical Basis

Facilities for Functional Test on Integrated Circuits

Production Test System - Advantest 93000

Power supply:
2xGP-DPS: 4 ch., max 16 A, ±8 V force/measure
MS-DPS: 8 ch., max 16 A, ±8 V force/measure
DPS32: 32 ch., max 48 A @ 3 V, 0-7 V force/measure
digital resources:
2xPS1600: 256 ch. @ 533 Mb/s, 32 ch. @ 1.6 Gb/s
1xPS9G: 64 ch. @ 800 Mb/s, 32 ch. @ 8 Gb/s
1xPSSL: 16 ch. @ 16 Gb/s

Analog resources:
MBAV8+: 
Source 4 AWG, max 200 MHz @ 500 Ms/s
Measure 4 Digitizers, max 16 bit @ 300 MHz
V-Source, PMU, HPPMU multiplex

Additional software for memory test and scan test analysis
Supports manual package test and automatic wafer test (using the UF200 wafer prober)

Accretech UF200 wafer prober
Fully automatic wafer prober for up to 25 wafers/lot
Supports 6inch and 8inch wafers
Temperature controlled chuck, -40°C up to +125°C

Debugging Test System

MuTest

  • pre-series & medium scale
    volume production tester
  • radiation test
  • power supply
    • 8 channels with 800 mA
    • 2 channels with 5 A
    • Voltage range -4 V to 10 V
  • digital resources
    • 4xM-D864: 256 ch @ 800 Mb/s
    • voltage range -1.5 V to 6.5 V

Binder MK 53 E2

  • climate chamber for endurance tests
  • temperature range: 40 ° to 150 °C
  • fully programmable & remotely controllable

Thermostream TP04300

  • mobile programmable temperature system
  • temperature performance:
    • Range: -75 ° to 228 °C
    • Transition: ±180 °C in < 10 s
    • Accuracy: 1 °C
  • DUT temperature sensors

Infrared camera

Spectral range 7.5 .. 14µm
Temperature measurement range -40°C .. 1200°C
Image size 640x480

Standard lens 1.0/30 mm
image area (30 x 23)°,
minimum distance 300mm

Microscope objective 1,0x
image (16 x 12) mm²,
distance 50 mm, resolution 25µm

Online:
up to 10 points

Offline:
temperature of each pixel can be determined, additionally regions with min/max evaluation can be defined

Usage:
e.g. detection of hot spots on chips (caused by shorts), thermal check of PCBs, etc.

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